DE69620952T2 - Rechnersystem mit Zwei-Phasen-Kontrollpunkten - Google Patents

Rechnersystem mit Zwei-Phasen-Kontrollpunkten

Info

Publication number
DE69620952T2
DE69620952T2 DE69620952T DE69620952T DE69620952T2 DE 69620952 T2 DE69620952 T2 DE 69620952T2 DE 69620952 T DE69620952 T DE 69620952T DE 69620952 T DE69620952 T DE 69620952T DE 69620952 T2 DE69620952 T2 DE 69620952T2
Authority
DE
Germany
Prior art keywords
computer system
phase control
control points
points
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69620952T
Other languages
English (en)
Other versions
DE69620952D1 (de
Inventor
Hideyuki Hirayama
Kuniyasu Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69620952D1 publication Critical patent/DE69620952D1/de
Publication of DE69620952T2 publication Critical patent/DE69620952T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/1407—Checkpointing the instruction stream

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Retry When Errors Occur (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE69620952T 1995-06-19 1996-06-12 Rechnersystem mit Zwei-Phasen-Kontrollpunkten Expired - Fee Related DE69620952T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7151739A JP3020833B2 (ja) 1995-06-19 1995-06-19 チェックポイント取得システム

Publications (2)

Publication Number Publication Date
DE69620952D1 DE69620952D1 (de) 2002-06-06
DE69620952T2 true DE69620952T2 (de) 2002-12-05

Family

ID=15525234

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69620952T Expired - Fee Related DE69620952T2 (de) 1995-06-19 1996-06-12 Rechnersystem mit Zwei-Phasen-Kontrollpunkten

Country Status (6)

Country Link
US (1) US5845326A (de)
EP (1) EP0750259B1 (de)
JP (1) JP3020833B2 (de)
KR (1) KR100243460B1 (de)
CN (1) CN1090353C (de)
DE (1) DE69620952T2 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2916421B2 (ja) * 1996-09-09 1999-07-05 株式会社東芝 キャッシュフラッシュ装置およびデータ処理方法
JPH10320274A (ja) * 1997-03-19 1998-12-04 Toshiba Corp キャッシュフラッシュ装置及び同装置を備えた計算機システム、記録媒体
US6378047B1 (en) * 1997-07-07 2002-04-23 Micron Technology, Inc. System and method for invalidating set-associative cache memory with simultaneous set validity determination
JP3414218B2 (ja) 1997-09-12 2003-06-09 株式会社日立製作所 記憶制御装置
JP4303803B2 (ja) * 1998-04-22 2009-07-29 株式会社東芝 キャッシュフラッシュ装置
US6332199B1 (en) * 1998-10-29 2001-12-18 International Business Machines Corporation Restoring checkpointed processes including adjusting environment variables of the processes
US6321238B1 (en) * 1998-12-28 2001-11-20 Oracle Corporation Hybrid shared nothing/shared disk database system
US6453427B2 (en) * 1998-12-31 2002-09-17 Intel Corporation Method and apparatus for handling data errors in a computer system
JP2000207219A (ja) * 1999-01-18 2000-07-28 Fujitsu Ten Ltd 車載端末とセンタ―との間の通信システム、及び、通信システムに使用する車載端末
US6526447B1 (en) * 1999-12-14 2003-02-25 International Business Machines Corporation Apparatus for restarting interrupted data transfer and method therefor
US6658532B1 (en) * 1999-12-15 2003-12-02 Intel Corporation Cache flushing
US6675316B1 (en) * 2000-07-12 2004-01-06 International Business Machines Corporation Method and system for recovery of the state of a failed CPU/cache/memory node in a distributed shared memory system
US7062675B1 (en) * 2002-06-25 2006-06-13 Emc Corporation Data storage cache system shutdown scheme
JP4116372B2 (ja) 2002-09-03 2008-07-09 富士フイルム株式会社 磁気テープカートリッジ
US6976128B1 (en) * 2002-09-26 2005-12-13 Unisys Corporation Cache flush system and method
US6973541B1 (en) * 2002-09-26 2005-12-06 Unisys Corporation System and method for initializing memory within a data processing system
US7139772B2 (en) 2003-08-01 2006-11-21 Oracle International Corporation Ownership reassignment in a shared-nothing database system
US7277897B2 (en) * 2003-08-01 2007-10-02 Oracle International Corporation Dynamic reassignment of data ownership
US8234517B2 (en) * 2003-08-01 2012-07-31 Oracle International Corporation Parallel recovery by non-failed nodes
US7120651B2 (en) * 2003-08-01 2006-10-10 Oracle International Corporation Maintaining a shared cache that has partitions allocated among multiple nodes and a data-to-partition mapping
AU2003252363A1 (en) * 2003-08-04 2005-02-15 Sakata Inx Corp. Coating material composition with gas-barrier property, process for producing the same, and gas-barrier packaging container obtained therefrom
US20050057079A1 (en) * 2003-09-17 2005-03-17 Tom Lee Multi-functional chair
US6926199B2 (en) * 2003-11-25 2005-08-09 Segwave, Inc. Method and apparatus for storing personalized computing device setting information and user session information to enable a user to transport such settings between computing devices
JP4189342B2 (ja) * 2004-03-11 2008-12-03 東芝ソリューション株式会社 ストレージ装置、ストレージコントローラ及びライトバックキャッシュ制御方法
US7724263B2 (en) * 2004-05-14 2010-05-25 Nvidia Corporation System and method for a universal data write unit in a 3-D graphics pipeline including generic cache memories
US7290166B2 (en) * 2004-07-28 2007-10-30 Intel Corporation Rollback of data
US7360112B2 (en) 2005-02-07 2008-04-15 International Business Machines Corporation Detection and recovery of dropped writes in storage devices
JP4435705B2 (ja) * 2005-03-14 2010-03-24 富士通株式会社 記憶装置、その制御方法及びプログラム
US8812781B2 (en) 2005-04-19 2014-08-19 Hewlett-Packard Development Company, L.P. External state cache for computer processor
GB0507912D0 (en) 2005-04-20 2005-05-25 Ibm Disk drive and method for protecting data writes in a disk drive
US20070006042A1 (en) * 2005-06-30 2007-01-04 International Business Machines Corporation Software debug support for cache flush with access to external data location(s) through debug port
US7814065B2 (en) 2005-08-16 2010-10-12 Oracle International Corporation Affinity-based recovery/failover in a cluster environment
US8180968B2 (en) * 2007-03-28 2012-05-15 Oracle America, Inc. Reduction of cache flush time using a dirty line limiter
US8510334B2 (en) 2009-11-05 2013-08-13 Oracle International Corporation Lock manager on disk
JP5209591B2 (ja) * 2009-11-16 2013-06-12 株式会社日立製作所 省電力機能を有するストレージシステム
KR102468737B1 (ko) * 2017-12-19 2022-11-21 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0163096B1 (de) * 1984-04-26 1988-11-17 BBC Brown Boveri AG Einrichtung zur Rettung eines Rechnerzustandes
US4740969A (en) * 1986-06-27 1988-04-26 Hewlett-Packard Company Method and apparatus for recovering from hardware faults
JPH0752399B2 (ja) * 1988-06-30 1995-06-05 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 記憶システム
US5649136A (en) * 1995-02-14 1997-07-15 Hal Computer Systems, Inc. Processor structure and method for maintaining and restoring precise state at any instruction boundary

Also Published As

Publication number Publication date
KR970002636A (ko) 1997-01-28
EP0750259B1 (de) 2002-05-02
CN1090353C (zh) 2002-09-04
DE69620952D1 (de) 2002-06-06
JP3020833B2 (ja) 2000-03-15
KR100243460B1 (ko) 2000-02-01
CN1146026A (zh) 1997-03-26
JPH096636A (ja) 1997-01-10
US5845326A (en) 1998-12-01
EP0750259A1 (de) 1996-12-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee