DE69516817D1 - Peripheriegerät zur Ausführung von Bitfeldbefehlen - Google Patents
Peripheriegerät zur Ausführung von BitfeldbefehlenInfo
- Publication number
- DE69516817D1 DE69516817D1 DE69516817T DE69516817T DE69516817D1 DE 69516817 D1 DE69516817 D1 DE 69516817D1 DE 69516817 T DE69516817 T DE 69516817T DE 69516817 T DE69516817 T DE 69516817T DE 69516817 D1 DE69516817 D1 DE 69516817D1
- Authority
- DE
- Germany
- Prior art keywords
- peripheral device
- bit field
- executing bit
- field commands
- commands
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000002093 peripheral effect Effects 0.000 title 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30018—Bit or string instructions
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Memory System (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US33779294A | 1994-11-14 | 1994-11-14 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69516817D1 true DE69516817D1 (de) | 2000-06-15 |
DE69516817T2 DE69516817T2 (de) | 2000-12-07 |
Family
ID=23322028
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69516817T Expired - Fee Related DE69516817T2 (de) | 1994-11-14 | 1995-10-24 | Peripheriegerät zur Ausführung von Bitfeldbefehlen |
Country Status (5)
Country | Link |
---|---|
US (1) | US6081869A (de) |
EP (1) | EP0715252B1 (de) |
JP (1) | JP2914428B2 (de) |
KR (1) | KR100225187B1 (de) |
DE (1) | DE69516817T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6523108B1 (en) | 1999-11-23 | 2003-02-18 | Sony Corporation | Method of and apparatus for extracting a string of bits from a binary bit string and depositing a string of bits onto a binary bit string |
US8006114B2 (en) | 2007-03-09 | 2011-08-23 | Analog Devices, Inc. | Software programmable timing architecture |
US20170185402A1 (en) * | 2015-12-23 | 2017-06-29 | Intel Corporation | Instructions and logic for bit field address and insertion |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4028670A (en) * | 1976-02-06 | 1977-06-07 | International Business Machines Corporation | Fetch instruction for operand address calculation |
US4764896A (en) * | 1985-07-01 | 1988-08-16 | Honeywell Inc. | Microprocessor assisted memory to memory move apparatus |
US5210835A (en) * | 1986-08-27 | 1993-05-11 | Ken Sakamura | Data processing system having apparatus for increasing the execution speed of bit field instructions |
JP2613223B2 (ja) * | 1987-09-10 | 1997-05-21 | 株式会社日立製作所 | 演算装置 |
US5287503A (en) * | 1991-09-27 | 1994-02-15 | Sun Microsystems, Inc. | System having control registers coupled to a bus whereby addresses on the bus select a control register and a function to be performed on the control register |
-
1995
- 1995-10-24 EP EP95116747A patent/EP0715252B1/de not_active Expired - Lifetime
- 1995-10-24 DE DE69516817T patent/DE69516817T2/de not_active Expired - Fee Related
- 1995-11-08 JP JP7289829A patent/JP2914428B2/ja not_active Expired - Lifetime
- 1995-11-13 KR KR1019950040925A patent/KR100225187B1/ko not_active IP Right Cessation
-
1997
- 1997-08-06 US US08/907,066 patent/US6081869A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0715252A1 (de) | 1996-06-05 |
DE69516817T2 (de) | 2000-12-07 |
EP0715252B1 (de) | 2000-05-10 |
KR100225187B1 (ko) | 1999-10-15 |
JP2914428B2 (ja) | 1999-06-28 |
KR960018881A (ko) | 1996-06-17 |
US6081869A (en) | 2000-06-27 |
JPH08212130A (ja) | 1996-08-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8339 | Ceased/non-payment of the annual fee |