DE69512587T2 - Zeilendekodierer und-treiber mit umschaltbarer vorspannung der wannenbereiche - Google Patents

Zeilendekodierer und-treiber mit umschaltbarer vorspannung der wannenbereiche

Info

Publication number
DE69512587T2
DE69512587T2 DE69512587T DE69512587T DE69512587T2 DE 69512587 T2 DE69512587 T2 DE 69512587T2 DE 69512587 T DE69512587 T DE 69512587T DE 69512587 T DE69512587 T DE 69512587T DE 69512587 T2 DE69512587 T2 DE 69512587T2
Authority
DE
Germany
Prior art keywords
drivers
switchable bias
line encoders
preload
bias preload
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69512587T
Other languages
English (en)
Other versions
DE69512587D1 (de
Inventor
Loc Hoang
Khoi Dinh
Jitendra Kulkarni
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Application granted granted Critical
Publication of DE69512587D1 publication Critical patent/DE69512587D1/de
Publication of DE69512587T2 publication Critical patent/DE69512587T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
DE69512587T 1994-03-03 1995-02-27 Zeilendekodierer und-treiber mit umschaltbarer vorspannung der wannenbereiche Expired - Fee Related DE69512587T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/206,446 US5365479A (en) 1994-03-03 1994-03-03 Row decoder and driver with switched-bias bulk regions
PCT/US1995/002423 WO1995024041A1 (en) 1994-03-03 1995-02-27 Row decoder and driver with switched-bias bulk regions

Publications (2)

Publication Number Publication Date
DE69512587D1 DE69512587D1 (de) 1999-11-11
DE69512587T2 true DE69512587T2 (de) 2000-05-11

Family

ID=22766422

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69512587T Expired - Fee Related DE69512587T2 (de) 1994-03-03 1995-02-27 Zeilendekodierer und-treiber mit umschaltbarer vorspannung der wannenbereiche

Country Status (4)

Country Link
US (1) US5365479A (de)
EP (1) EP0698272B1 (de)
DE (1) DE69512587T2 (de)
WO (1) WO1995024041A1 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2835215B2 (ja) * 1991-07-25 1998-12-14 株式会社東芝 不揮発性半導体記憶装置
US5701143A (en) * 1995-01-31 1997-12-23 Cirrus Logic, Inc. Circuits, systems and methods for improving row select speed in a row select memory device
US5604711A (en) * 1995-05-19 1997-02-18 Cypress Semiconductor, Corporation Low power high voltage switch with gate bias circuit to minimize power consumption
US5546353A (en) * 1995-05-26 1996-08-13 National Semiconductor Corporation Partitioned decode circuit for low power operation
US5661683A (en) * 1996-02-05 1997-08-26 Integrated Silicon Solution Inc. On-chip positive and negative high voltage wordline x-decoding for EPROM/FLASH
JP3156618B2 (ja) * 1997-01-30 2001-04-16 日本電気株式会社 不揮発性半導体記憶装置
US5796656A (en) * 1997-02-22 1998-08-18 Programmable Microelectronics Corporation Row decoder circuit for PMOS non-volatile memory cell which uses electron tunneling for programming and erasing
DE69721724T2 (de) * 1997-02-28 2004-03-25 Stmicroelectronics S.R.L., Agrate Brianza Spannungspegelumsetzungsverfahren, insbesondere für nichtflüchtigen Speicher
US5812463A (en) * 1997-08-26 1998-09-22 Integrated Silicon Solution, Inc. System and method for a high speed, high voltage latch for memory devices
KR100294452B1 (ko) * 1997-10-08 2001-09-17 윤종용 레벨쉬프트회로를갖는반도체메모리장치
US6081455A (en) * 1999-01-14 2000-06-27 Advanced Micro Devices, Inc. EEPROM decoder block having a p-well coupled to a charge pump for charging the p-well and method of programming with the EEPROM decoder block
DE10038925A1 (de) * 2000-08-09 2002-03-14 Infineon Technologies Ag Elektronische Treiberschaltung für Wortleitungen einer Speichermatrix und Speichervorrichtung
KR100481857B1 (ko) 2002-08-14 2005-04-11 삼성전자주식회사 레이아웃 면적을 줄이고 뱅크 마다 독립적인 동작을수행할 수 있는 디코더를 갖는 플레쉬 메모리 장치
US7274618B2 (en) * 2005-06-24 2007-09-25 Monolithic System Technology, Inc. Word line driver for DRAM embedded in a logic process
US7499307B2 (en) * 2005-06-24 2009-03-03 Mosys, Inc. Scalable embedded DRAM array
US7447105B2 (en) * 2006-10-26 2008-11-04 Winbond Electronics Corp. Memory row decoder
US8971147B2 (en) 2012-10-30 2015-03-03 Freescale Semiconductor, Inc. Control gate word line driver circuit for multigate memory
US9064552B2 (en) * 2013-02-27 2015-06-23 Taiwan Semiconductor Manufacturing Company, Ltd. Word line driver and related method

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5265052A (en) * 1989-07-20 1993-11-23 Texas Instruments Incorporated Wordline driver circuit for EEPROM memory cell
JPH03276673A (ja) * 1990-03-26 1991-12-06 Matsushita Electric Ind Co Ltd 半導体記憶装置
US5287536A (en) * 1990-04-23 1994-02-15 Texas Instruments Incorporated Nonvolatile memory array wordline driver circuit with voltage translator circuit
US5272368A (en) * 1991-05-10 1993-12-21 Altera Corporation Complementary low power non-volatile reconfigurable EEcell
JP2835215B2 (ja) * 1991-07-25 1998-12-14 株式会社東芝 不揮発性半導体記憶装置
JP3376594B2 (ja) * 1991-11-20 2003-02-10 日本電気株式会社 行デコーダ
EP0559995B1 (de) * 1992-03-11 1998-09-16 STMicroelectronics S.r.l. Dekodierschaltung fähig zur Ubertragung von positiven und negativen Spannungen
US5291446A (en) * 1992-10-22 1994-03-01 Advanced Micro Devices, Inc. VPP power supply having a regulator circuit for controlling a regulated positive potential

Also Published As

Publication number Publication date
US5365479A (en) 1994-11-15
WO1995024041A1 (en) 1995-09-08
EP0698272A1 (de) 1996-02-28
DE69512587D1 (de) 1999-11-11
EP0698272B1 (de) 1999-10-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee