DE69500346D1 - Verbesserte Speicherselbstprüfung - Google Patents

Verbesserte Speicherselbstprüfung

Info

Publication number
DE69500346D1
DE69500346D1 DE69500346T DE69500346T DE69500346D1 DE 69500346 D1 DE69500346 D1 DE 69500346D1 DE 69500346 T DE69500346 T DE 69500346T DE 69500346 T DE69500346 T DE 69500346T DE 69500346 D1 DE69500346 D1 DE 69500346D1
Authority
DE
Germany
Prior art keywords
check
improved memory
memory self
self
improved
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69500346T
Other languages
English (en)
Other versions
DE69500346T2 (de
Inventor
Otto Torreiter
Roland Metzger
Dieter Wendel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69500346D1 publication Critical patent/DE69500346D1/de
Application granted granted Critical
Publication of DE69500346T2 publication Critical patent/DE69500346T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466—Key-lock mechanism
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60—Protecting data
    • G06F21/64—Protecting data integrity, e.g. using checksums, certificates or signatures
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G11C29/40—Response verification devices using compression techniques
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • General Health & Medical Sciences (AREA)
  • Bioethics (AREA)
  • Health & Medical Sciences (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Microcomputers (AREA)
  • Storage Device Security (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE69500346T 1995-01-23 1995-01-23 Verbesserte Speicherselbstprüfung Expired - Fee Related DE69500346T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP95100835A EP0727785B1 (de) 1995-01-23 1995-01-23 Verbesserte Speicherselbstprüfung

Publications (2)

Publication Number Publication Date
DE69500346D1 true DE69500346D1 (de) 1997-07-17
DE69500346T2 DE69500346T2 (de) 1997-12-11

Family

ID=8218927

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69500346T Expired - Fee Related DE69500346T2 (de) 1995-01-23 1995-01-23 Verbesserte Speicherselbstprüfung

Country Status (4)

Country Link
US (1) US5742616A (de)
EP (1) EP0727785B1 (de)
JP (1) JPH08241254A (de)
DE (1) DE69500346T2 (de)

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USRE39369E1 (en) 1995-06-29 2006-10-31 Igt Electronic casino gaming system with improved play capacity, authentication and security
US7063615B2 (en) * 1995-06-29 2006-06-20 Igt Electronic gaming apparatus with authentication
US5643086A (en) 1995-06-29 1997-07-01 Silicon Gaming, Inc. Electronic casino gaming apparatus with improved play capacity, authentication and security
FR2754926B1 (fr) * 1996-10-23 1998-11-20 Schlumberger Ind Sa Procede de gestion de defauts d'integrite de donnees dans une memoire reinscriptible
EP0898747B1 (de) * 1996-11-15 2008-01-09 Nxp B.V. Schutzverfahren gegen ein eeprom-gerichtetes-eindringen in ein mobiles kommunikationsgerät mit einem prozessor und ein gerät mit einem solchen schutzmechanismus
US5991898A (en) * 1997-03-10 1999-11-23 Mentor Graphics Corporation Arithmetic built-in self test of multiple scan-based integrated circuits
JP3980706B2 (ja) * 1997-05-23 2007-09-26 危機管理株式会社 Ｉｃカードおよびその認証装置
US20020025852A1 (en) * 2000-09-29 2002-02-28 Alcorn Allan E. Gaming apparatus with portrait-mode display
JP3670449B2 (ja) * 1997-07-09 2005-07-13 株式会社東芝 半導体装置
GB9814608D0 (en) * 1998-07-07 1998-09-02 Lucas Ind Plc Data integrity checking apparatus
US6496946B2 (en) * 1999-05-10 2002-12-17 Motorola, Inc. Electronic control apparatus with memory validation and method
EP1065598A1 (de) * 1999-06-24 2001-01-03 Siemens Aktiengesellschaft Verfahren zum Zugriff auf einen Speicher und Speichereinrichtung hierfür
KR100517546B1 (ko) 1999-07-16 2005-09-28 삼성전자주식회사 엘이디 표시기에 포스트 코드를 표시하는 휴대용 컴퓨터
TW451212B (en) * 1999-12-03 2001-08-21 Macronix Int Co Ltd Read only memory chip having a built in testing circuit
DE19963208B4 (de) * 1999-12-28 2018-07-05 Robert Bosch Gmbh Verfahren zum Manipulationsnachweis einer programmierbaren Speichereinrichtung eines digitalen Steuergeräts
US7988559B2 (en) * 2001-03-08 2011-08-02 Igt Computerized gaming system, method and apparatus
US7043641B1 (en) 2000-03-08 2006-05-09 Igt Encryption in a secure computerized gaming system
CA2402389A1 (en) * 2000-03-08 2002-09-19 Shuffle Master, Inc. Computerized gaming system, method and apparatus
CA2420290C (en) * 2000-08-21 2009-04-21 Igt Method and apparatus for software authentication
JP2002184948A (ja) * 2000-12-12 2002-06-28 Hitachi Ltd 半導体集積回路装置の製造方法
US7203841B2 (en) 2001-03-08 2007-04-10 Igt Encryption in a secure computerized gaming system
US6751718B1 (en) 2001-03-26 2004-06-15 Networks Associates Technology, Inc. Method, system and computer program product for using an instantaneous memory deficit metric to detect and reduce excess paging operations in a computer system
US7162036B2 (en) 2001-08-06 2007-01-09 Igt Digital identification of unique game characteristics
US6685567B2 (en) * 2001-08-08 2004-02-03 Igt Process verification
EP1433078A4 (de) * 2001-09-10 2006-11-15 Igt Reno Nev Verfahren zum entwickeln von spielprogrammen, die mit einem computerisierten spielbetriebssystem kompatibel sind, und vorrichtung
US8708828B2 (en) 2001-09-28 2014-04-29 Igt Pluggable modular gaming modifiers and configuration templates for gaming environments
US6902481B2 (en) 2001-09-28 2005-06-07 Igt Decoupling of the graphical presentation of a game from the presentation logic
US7931533B2 (en) 2001-09-28 2011-04-26 Igt Game development architecture that decouples the game logic from the graphics logics
US7179170B2 (en) 2001-11-26 2007-02-20 Igt Pass-through live validation device and method
US20030203755A1 (en) * 2002-04-25 2003-10-30 Shuffle Master, Inc. Encryption in a secure computerized gaming system
US7203878B2 (en) * 2002-07-19 2007-04-10 Sun Microsystems, Inc. System and method for performing predictable signature analysis in the presence of multiple data streams
US7069377B2 (en) * 2003-05-08 2006-06-27 Micron Technology, Inc. Scratch control memory array in a flash memory device
US8122215B1 (en) * 2003-09-15 2012-02-21 The Directv Group, Inc. Method and apparatus for verifying memory contents
US7260757B2 (en) * 2003-11-25 2007-08-21 International Business Machines Corporation System and method for testing electronic devices on a microchip
TWI260641B (en) * 2005-01-06 2006-08-21 Prolific Technology Inc Method for storing compare data in a read-only memory built-in self-test circuit
US8321686B2 (en) * 2005-02-07 2012-11-27 Sandisk Technologies Inc. Secure memory card with life cycle phases
US8423788B2 (en) * 2005-02-07 2013-04-16 Sandisk Technologies Inc. Secure memory card with life cycle phases
US8108691B2 (en) * 2005-02-07 2012-01-31 Sandisk Technologies Inc. Methods used in a secure memory card with life cycle phases
US7539906B2 (en) * 2005-03-30 2009-05-26 Freescale Semiconductor, Inc. System for integrated data integrity verification and method thereof
EP1748374A1 (de) 2005-07-08 2007-01-31 STMicroelectronics SA Verfahren und Vorrichtung zum Schutz eines Speichers gegen Angriffe mittels Fehlerinjektion
US7743409B2 (en) * 2005-07-08 2010-06-22 Sandisk Corporation Methods used in a mass storage device with automated credentials loading
DE102005042790B4 (de) * 2005-09-08 2010-11-18 Infineon Technologies Ag Integrierte Schaltungsanordnung und Verfahren zum Betrieb einer solchen
ITVA20070041A1 (it) * 2007-04-11 2008-10-12 St Microelectronics Srl Procedimento e sistema di autoverifica della funzionalita' di una memoria contenuta in un dispositivo integrato
JP2008262630A (ja) 2007-04-11 2008-10-30 Matsushita Electric Ind Co Ltd 半導体集積回路及びメモリ検査方法
US7818638B2 (en) * 2007-06-15 2010-10-19 Micron Technology, Inc. Systems and devices including memory with built-in self test and methods of making and using the same
US8120377B2 (en) * 2009-06-26 2012-02-21 Apple Inc. Integrated circuit having secure access to test modes
US8627097B2 (en) 2012-03-27 2014-01-07 Igt System and method enabling parallel processing of hash functions using authentication checkpoint hashes
DE102013018308A1 (de) * 2013-10-31 2015-04-30 Giesecke & Devrient Gmbh Verfahren zum Prüfen eines Chipmoduls eines tragbaren Datenträgers
US11645134B2 (en) * 2019-08-20 2023-05-09 Micron Technology, Inc. Apparatuses and methods for fuse error detection

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6267800A (ja) * 1985-09-20 1987-03-27 Hitachi Ltd 半導体集積回路装置
JPH0682405B2 (ja) * 1986-01-14 1994-10-19 カシオ計算機株式会社 テストプログラム起動方式
GB8613154D0 (en) * 1986-05-30 1986-07-02 Int Computers Ltd Testing memory
US4727544A (en) * 1986-06-05 1988-02-23 Bally Manufacturing Corporation Memory integrity checking system for a gaming device
JP2514954B2 (ja) * 1987-03-13 1996-07-10 三菱電機株式会社 Ｉｃカ−ド
DE59105797D1 (de) * 1991-03-28 1995-07-27 Siemens Ag Verfahren zum Testen eines Datenspeichers und zugehörigen Schutzspeichers und Anordnung zur Durchführung des Verfahrens.
DE4219739A1 (de) * 1992-06-17 1993-12-23 Philips Patentverwaltung Verfahren und Schaltungsanordnung zum Prüfen einer Wertkarte

Also Published As

Publication number Publication date
DE69500346T2 (de) 1997-12-11
EP0727785B1 (de) 1997-06-11
EP0727785A1 (de) 1996-08-21
US5742616A (en) 1998-04-21
JPH08241254A (ja) 1996-09-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee