DE69424115D1 - Rechnersystem und Verfahren zur Verarbeitung von Vektordaten - Google Patents

Rechnersystem und Verfahren zur Verarbeitung von Vektordaten

Info

Publication number
DE69424115D1
DE69424115D1 DE69424115T DE69424115T DE69424115D1 DE 69424115 D1 DE69424115 D1 DE 69424115D1 DE 69424115 T DE69424115 T DE 69424115T DE 69424115 T DE69424115 T DE 69424115T DE 69424115 D1 DE69424115 D1 DE 69424115D1
Authority
DE
Germany
Prior art keywords
computer system
vector data
processing vector
processing
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69424115T
Other languages
English (en)
Other versions
DE69424115T2 (de
Inventor
Madian Somasundaram
Dinesh C Maheshwari
Akira Watanabe
Bruce T Mckeever
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE69424115D1 publication Critical patent/DE69424115D1/de
Publication of DE69424115T2 publication Critical patent/DE69424115T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30112—Register structure comprising data of variable length
DE69424115T 1993-10-05 1994-10-04 Rechnersystem und Verfahren zur Verarbeitung von Vektordaten Expired - Lifetime DE69424115T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13175893A 1993-10-05 1993-10-05

Publications (2)

Publication Number Publication Date
DE69424115D1 true DE69424115D1 (de) 2000-05-31
DE69424115T2 DE69424115T2 (de) 2001-02-01

Family

ID=22450894

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69424115T Expired - Lifetime DE69424115T2 (de) 1993-10-05 1994-10-04 Rechnersystem und Verfahren zur Verarbeitung von Vektordaten

Country Status (5)

Country Link
US (1) US5669013A (de)
EP (1) EP0646877B1 (de)
JP (1) JPH07152733A (de)
KR (1) KR100289746B1 (de)
DE (1) DE69424115T2 (de)

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US5729724A (en) * 1995-12-20 1998-03-17 Intel Corporation Adaptive 128-bit floating point load and store operations for quadruple precision compatibility
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US6061521A (en) * 1996-12-02 2000-05-09 Compaq Computer Corp. Computer having multimedia operations executable as two distinct sets of operations within a single instruction cycle
US5909572A (en) 1996-12-02 1999-06-01 Compaq Computer Corp. System and method for conditionally moving an operand from a source register to a destination register
US6173366B1 (en) 1996-12-02 2001-01-09 Compaq Computer Corp. Load and store instructions which perform unpacking and packing of data bits in separate vector and integer cache storage
US5941938A (en) * 1996-12-02 1999-08-24 Compaq Computer Corp. System and method for performing an accumulate operation on one or more operands within a partitioned register
US6009505A (en) * 1996-12-02 1999-12-28 Compaq Computer Corp. System and method for routing one operand to arithmetic logic units from fixed register slots and another operand from any register slot
EP0918290A1 (de) * 1997-11-19 1999-05-26 Interuniversitair Micro-Elektronica Centrum Vzw Verfahren zur Übertragung von Datenstrukturen zu und von Vektorregistern eines Prozessors
US5946496A (en) * 1997-12-10 1999-08-31 Cray Research, Inc. Distributed vector architecture
US5913069A (en) * 1997-12-10 1999-06-15 Cray Research, Inc. Interleaving memory in distributed vector architecture multiprocessor system
US6023738A (en) * 1998-03-30 2000-02-08 Nvidia Corporation Method and apparatus for accelerating the transfer of graphical images
US6304963B1 (en) * 1998-05-14 2001-10-16 Arm Limited Handling exceptions occuring during processing of vector instructions
US6189094B1 (en) * 1998-05-27 2001-02-13 Arm Limited Recirculating register file
WO1999061997A1 (en) * 1998-05-27 1999-12-02 Arm Limited Recirculating register file
US6282634B1 (en) * 1998-05-27 2001-08-28 Arm Limited Apparatus and method for processing data having a mixed vector/scalar register file
EP1365385B1 (de) 1998-11-09 2012-06-13 Broadcom Corporation Graphisches Anzeigesystem mit Graphikschichtverarbeitung, Alphamischung und Zusammenstellung mit Videodaten
US6044030A (en) * 1998-12-21 2000-03-28 Philips Electronics North America Corporation FIFO unit with single pointer
US6300935B1 (en) * 1999-04-20 2001-10-09 Agilent Technologies, Inc. Image interpolation circuit architecture and method for fast bi-cubic interpolation of image information
US6654819B1 (en) * 1999-07-15 2003-11-25 Texas Instruments Incorporated External direct memory access processor interface to centralized transaction processor
US6574683B1 (en) * 1999-07-15 2003-06-03 Texas Instruments Incorporated External direct memory access processor implementation that includes a plurality of priority levels stored in request queue
US6591361B1 (en) 1999-12-28 2003-07-08 International Business Machines Corporation Method and apparatus for converting data into different ordinal types
US6665790B1 (en) * 2000-02-29 2003-12-16 International Business Machines Corporation Vector register file with arbitrary vector addressing
US7308559B2 (en) * 2000-02-29 2007-12-11 International Business Machines Corporation Digital signal processor with cascaded SIMD organization
US6701424B1 (en) * 2000-04-07 2004-03-02 Nintendo Co., Ltd. Method and apparatus for efficient loading and storing of vectors
US6857061B1 (en) 2000-04-07 2005-02-15 Nintendo Co., Ltd. Method and apparatus for obtaining a scalar value directly from a vector register
GB2382673B (en) * 2001-10-31 2005-10-26 Alphamosaic Ltd A vector processing system
JP3855270B2 (ja) * 2003-05-29 2006-12-06 ソニー株式会社 アンテナ実装方法
US7610466B2 (en) * 2003-09-05 2009-10-27 Freescale Semiconductor, Inc. Data processing system using independent memory and register operand size specifiers and method thereof
US7107436B2 (en) * 2003-09-08 2006-09-12 Freescale Semiconductor, Inc. Conditional next portion transferring of data stream to or from register based on subsequent instruction aspect
US7275148B2 (en) * 2003-09-08 2007-09-25 Freescale Semiconductor, Inc. Data processing system using multiple addressing modes for SIMD operations and method thereof
US7315932B2 (en) 2003-09-08 2008-01-01 Moyer William C Data processing system having instruction specifiers for SIMD register operands and method thereof
US8253750B1 (en) * 2004-02-14 2012-08-28 Nvidia Corporation Digital media processor
US20060101210A1 (en) * 2004-10-15 2006-05-11 Lance Dover Register-based memory command architecture
US7617338B2 (en) * 2005-02-03 2009-11-10 International Business Machines Corporation Memory with combined line and word access
US20090119460A1 (en) * 2007-11-07 2009-05-07 Infineon Technologies Ag Storing Portions of a Data Transfer Descriptor in Cached and Uncached Address Space
US7849294B2 (en) * 2008-01-31 2010-12-07 International Business Machines Corporation Sharing data in internal and memory representations with dynamic data-driven conversion
US7877582B2 (en) * 2008-01-31 2011-01-25 International Business Machines Corporation Multi-addressable register file
CN101763244B (zh) * 2010-01-21 2013-09-18 龙芯中科技术有限公司 存储器与寄存器之间的数据传输装置和方法
US9411585B2 (en) 2011-09-16 2016-08-09 International Business Machines Corporation Multi-addressable register files and format conversions associated therewith
US9727336B2 (en) 2011-09-16 2017-08-08 International Business Machines Corporation Fine-grained instruction enablement at sub-function granularity based on an indicated subrange of registers
US9342479B2 (en) 2012-08-23 2016-05-17 Qualcomm Incorporated Systems and methods of data extraction in a vector processor
US9965512B2 (en) 2013-06-25 2018-05-08 Sap Se Operators for constants in aggregated formulas
US10762164B2 (en) 2016-01-20 2020-09-01 Cambricon Technologies Corporation Limited Vector and matrix computing device
CN111580865B (zh) * 2016-01-20 2024-02-27 中科寒武纪科技股份有限公司 一种向量运算装置及运算方法
CN107704433A (zh) * 2016-01-20 2018-02-16 南京艾溪信息科技有限公司 一种矩阵运算指令及其方法

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JPS60134974A (ja) * 1983-12-23 1985-07-18 Hitachi Ltd ベクトル処理装置
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US4760518A (en) * 1986-02-28 1988-07-26 Scientific Computer Systems Corporation Bi-directional databus system for supporting superposition of vector and scalar operations in a computer
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JP3095393B2 (ja) * 1988-05-10 2000-10-03 クレイ・リサーチ・インコーポレイテッド ベクトルレジスタを備えたコンピュータにおけるベクトルテールゲーティング
JPH0792779B2 (ja) * 1988-10-08 1995-10-09 日本電気株式会社 データ転送制御装置
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US5418973A (en) * 1992-06-22 1995-05-23 Digital Equipment Corporation Digital computer system with cache controller coordinating both vector and scalar operations

Also Published As

Publication number Publication date
EP0646877A3 (de) 1995-11-02
DE69424115T2 (de) 2001-02-01
KR950012256A (ko) 1995-05-16
EP0646877B1 (de) 2000-04-26
KR100289746B1 (ko) 2001-05-15
US5669013A (en) 1997-09-16
EP0646877A2 (de) 1995-04-05
JPH07152733A (ja) 1995-06-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE