DE69331402D1 - Verfahren und Schaltungen zur Realisierung eines digitalen und modularen Querverbindungsnetzes - Google Patents

Verfahren und Schaltungen zur Realisierung eines digitalen und modularen Querverbindungsnetzes

Info

Publication number
DE69331402D1
DE69331402D1 DE69331402T DE69331402T DE69331402D1 DE 69331402 D1 DE69331402 D1 DE 69331402D1 DE 69331402 T DE69331402 T DE 69331402T DE 69331402 T DE69331402 T DE 69331402T DE 69331402 D1 DE69331402 D1 DE 69331402D1
Authority
DE
Germany
Prior art keywords
realizing
circuits
digital
methods
connection network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69331402T
Other languages
English (en)
Other versions
DE69331402T2 (de
Inventor
Alberto Lometti
Romano Valussi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Original Assignee
Alcatel SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel SA filed Critical Alcatel SA
Publication of DE69331402D1 publication Critical patent/DE69331402D1/de
Application granted granted Critical
Publication of DE69331402T2 publication Critical patent/DE69331402T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/06—Time-space-time switching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1611—Synchronous digital hierarchy [SDH] or SONET

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)
  • Multi Processors (AREA)
DE69331402T 1992-01-22 1993-01-16 Verfahren und Schaltungen zur Realisierung eines digitalen und modularen Querverbindungsnetzes Expired - Lifetime DE69331402T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITMI920108A IT1258805B (it) 1992-01-22 1992-01-22 Metodo per la realizzazione di una rete di connessione per segnali appartenenti alla gerarchia sincrona sdh (synchronous digital hierarchy), e circuiti integrati per l'implementazione del metodo

Publications (2)

Publication Number Publication Date
DE69331402D1 true DE69331402D1 (de) 2002-02-07
DE69331402T2 DE69331402T2 (de) 2002-08-22

Family

ID=11361627

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69331402T Expired - Lifetime DE69331402T2 (de) 1992-01-22 1993-01-16 Verfahren und Schaltungen zur Realisierung eines digitalen und modularen Querverbindungsnetzes

Country Status (5)

Country Link
EP (1) EP0552694B1 (de)
AU (1) AU661087B2 (de)
DE (1) DE69331402T2 (de)
ES (1) ES2167320T3 (de)
IT (1) IT1258805B (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI97843C (fi) * 1995-03-20 1997-02-25 Nokia Telecommunications Oy Menetelmä reittivarmistussignaalien kytkemiseksi digitaalisessa ristikytkimessä
FI97842C (fi) * 1995-03-20 1997-02-25 Nokia Telecommunications Oy Digitaalisen ristikytkimen konfigurointi
JP3216886B2 (ja) 1996-12-11 2001-10-09 インターナシヨナル・ビジネス・マシーンズ・コーポレーション ディジタル交差接続及び追加／除去マルチプレキシング装置
US6108333A (en) * 1998-02-25 2000-08-22 Lucent Technologies Inc. Nonblocking synchronous digital hierarchy column cross-point switch
US8711882B2 (en) 2011-12-23 2014-04-29 Lsi Corporation Reframing circuitry with virtual container drop and insert functionality to support circuit emulation protocols

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2228834B (en) * 1989-02-22 1992-12-23 Stc Plc Transmission networks

Also Published As

Publication number Publication date
AU661087B2 (en) 1995-07-13
AU3185293A (en) 1993-07-29
EP0552694B1 (de) 2002-01-02
ITMI920108A1 (it) 1993-07-22
EP0552694A2 (de) 1993-07-28
ITMI920108A0 (it) 1992-01-22
EP0552694A3 (en) 1995-01-25
DE69331402T2 (de) 2002-08-22
ES2167320T3 (es) 2002-05-16
IT1258805B (it) 1996-02-29

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: ALCATEL LUCENT, PARIS, FR