DE69331294T2 - Mikroprozessorgesteuertes Gerät - Google Patents

Mikroprozessorgesteuertes Gerät

Info

Publication number
DE69331294T2
DE69331294T2 DE69331294T DE69331294T DE69331294T2 DE 69331294 T2 DE69331294 T2 DE 69331294T2 DE 69331294 T DE69331294 T DE 69331294T DE 69331294 T DE69331294 T DE 69331294T DE 69331294 T2 DE69331294 T2 DE 69331294T2
Authority
DE
Germany
Prior art keywords
controlled device
microprocessor controlled
microprocessor
controlled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69331294T
Other languages
English (en)
Other versions
DE69331294D1 (de
Inventor
Andrew Menadue
Ian Withycombe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Mobile Phones UK Ltd
Original Assignee
Nokia Mobile Phones UK Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Mobile Phones UK Ltd filed Critical Nokia Mobile Phones UK Ltd
Application granted granted Critical
Publication of DE69331294D1 publication Critical patent/DE69331294D1/de
Publication of DE69331294T2 publication Critical patent/DE69331294T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Information Transfer Systems (AREA)
  • Controls And Circuits For Display Device (AREA)
DE69331294T 1992-03-24 1993-01-21 Mikroprozessorgesteuertes Gerät Expired - Fee Related DE69331294T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9206319A GB2265480B (en) 1992-03-24 1992-03-24 Microprocessor controlled apparatus

Publications (2)

Publication Number Publication Date
DE69331294D1 DE69331294D1 (de) 2002-01-24
DE69331294T2 true DE69331294T2 (de) 2003-02-13

Family

ID=10712669

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69331294T Expired - Fee Related DE69331294T2 (de) 1992-03-24 1993-01-21 Mikroprozessorgesteuertes Gerät

Country Status (5)

Country Link
US (1) US5671434A (de)
EP (1) EP0562704B1 (de)
JP (1) JP3251692B2 (de)
DE (1) DE69331294T2 (de)
GB (1) GB2265480B (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5936603A (en) * 1996-01-29 1999-08-10 Delco Electronics Corporation Liquid crystal display with temperature compensated voltage
US6031510A (en) * 1996-06-28 2000-02-29 Microchip Technology Incorporated Microcontroller with LCD control over updating of RAM-stored data determines LCD pixel activation
WO2001017298A1 (en) 1999-09-02 2001-03-08 Automated Business Companies Communication and proximity authorization systems
JP2008204249A (ja) * 2007-02-21 2008-09-04 Renesas Technology Corp データプロセッサ

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4486833A (en) * 1982-09-30 1984-12-04 At&T Bell Laboratories Microprocessor peripheral control circuit
IT1177400B (it) * 1984-12-12 1987-08-26 Honeywell Inf Systems Sistema a microprocessore
US4713748A (en) * 1985-02-12 1987-12-15 Texas Instruments Incorporated Microprocessor with block move instruction
US4713749A (en) * 1985-02-12 1987-12-15 Texas Instruments Incorporated Microprocessor with repeat instruction
US5125088A (en) * 1986-09-08 1992-06-23 Compaq Computer Corporation Computer system speed control at continuous processor speed
GB2234093B (en) * 1989-06-21 1992-01-15 Stratum Technology Limited Data store connection
DE69025341T2 (de) * 1989-12-22 1996-08-29 Sarnoff David Res Center Rastersequentielles Anzeigesystem mit einer von der Rückseite beleuchtbaren Anordnung von Flüssigkristallbildelementen und Verfahren zur Bilderzeugung
US5247636A (en) * 1990-05-31 1993-09-21 International Business Machines Corporation Digital processor clock circuit

Also Published As

Publication number Publication date
DE69331294D1 (de) 2002-01-24
GB9206319D0 (en) 1992-05-06
EP0562704B1 (de) 2001-12-12
GB2265480A (en) 1993-09-29
US5671434A (en) 1997-09-23
JPH0660006A (ja) 1994-03-04
JP3251692B2 (ja) 2002-01-28
GB2265480B (en) 1995-11-01
EP0562704A1 (de) 1993-09-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee