DE69327637D1 - Superskalar-Computersystem - Google Patents
Superskalar-ComputersystemInfo
- Publication number
- DE69327637D1 DE69327637D1 DE69327637T DE69327637T DE69327637D1 DE 69327637 D1 DE69327637 D1 DE 69327637D1 DE 69327637 T DE69327637 T DE 69327637T DE 69327637 T DE69327637 T DE 69327637T DE 69327637 D1 DE69327637 D1 DE 69327637D1
- Authority
- DE
- Germany
- Prior art keywords
- data
- destination
- source
- registers
- instructions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 abstract 2
- 238000012217 deletion Methods 0.000 abstract 1
- 230000037430 deletion Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3856—Reordering of instructions, e.g. using queues or age tags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3858—Result writeback, i.e. updating the architectural state or memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
- G06F9/3863—Recovery, e.g. branch miss-prediction, exception handling using multiple copies of the architectural state, e.g. shadow registers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Advance Control (AREA)
- Multi Processors (AREA)
- Holo Graphy (AREA)
- Earth Drilling (AREA)
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
- Lubricants (AREA)
- Steroid Compounds (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US96969592A | 1992-10-30 | 1992-10-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69327637D1 true DE69327637D1 (de) | 2000-02-24 |
DE69327637T2 DE69327637T2 (de) | 2000-07-06 |
Family
ID=25515870
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69327637T Expired - Fee Related DE69327637T2 (de) | 1992-10-30 | 1993-11-01 | Superskalar-Computersystem |
Country Status (9)
Country | Link |
---|---|
US (1) | US5481683A (de) |
EP (1) | EP0600611B1 (de) |
JP (1) | JP2698033B2 (de) |
KR (1) | KR970004509B1 (de) |
CN (1) | CN1053508C (de) |
AT (1) | ATE189071T1 (de) |
CA (1) | CA2098414C (de) |
DE (1) | DE69327637T2 (de) |
TW (1) | TW306987B (de) |
Families Citing this family (63)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06242948A (ja) * | 1993-02-16 | 1994-09-02 | Fujitsu Ltd | パイプライン処理計算機 |
US5724536A (en) * | 1994-01-04 | 1998-03-03 | Intel Corporation | Method and apparatus for blocking execution of and storing load operations during their execution |
US6378062B1 (en) * | 1994-01-04 | 2002-04-23 | Intel Corporation | Method and apparatus for performing a store operation |
US5537559A (en) * | 1994-02-08 | 1996-07-16 | Meridian Semiconductor, Inc. | Exception handling circuit and method |
US6205538B1 (en) * | 1994-08-24 | 2001-03-20 | Sun Microsystems, Inc. | Instruction result labeling in a counterflow pipeline processor |
US5625789A (en) * | 1994-10-24 | 1997-04-29 | International Business Machines Corporation | Apparatus for source operand dependendency analyses register renaming and rapid pipeline recovery in a microprocessor that issues and executes multiple instructions out-of-order in a single cycle |
US5675759A (en) * | 1995-03-03 | 1997-10-07 | Shebanow; Michael C. | Method and apparatus for register management using issue sequence prior physical register and register association validity information |
US5974240A (en) * | 1995-06-07 | 1999-10-26 | International Business Machines Corporation | Method and system for buffering condition code data in a data processing system having out-of-order and speculative instruction execution |
GB2308470B (en) * | 1995-12-22 | 2000-02-16 | Nokia Mobile Phones Ltd | Program memory scheme for processors |
US5761524A (en) * | 1996-03-15 | 1998-06-02 | Renditon, Inc. | Method and apparatus for performing and operation multiple times in response to a single instruction |
US5765016A (en) * | 1996-09-12 | 1998-06-09 | Advanced Micro Devices, Inc. | Reorder buffer configured to store both speculative and committed register states |
US5802338A (en) * | 1996-10-01 | 1998-09-01 | International Business Machines Corporation | Method of self-parallelizing and self-parallelizing multiprocessor using the method |
US5872949A (en) * | 1996-11-13 | 1999-02-16 | International Business Machines Corp. | Apparatus and method for managing data flow dependencies arising from out-of-order execution, by an execution unit, of an instruction series input from an instruction source |
US5889974A (en) * | 1996-12-30 | 1999-03-30 | Intel Corporation | Method and apparatus for the detection of reordering hazards |
US5805849A (en) * | 1997-03-31 | 1998-09-08 | International Business Machines Corporation | Data processing system and method for using an unique identifier to maintain an age relationship between executing instructions |
US5870582A (en) * | 1997-03-31 | 1999-02-09 | International Business Machines Corporation | Method and apparatus for completion of non-interruptible instructions before the instruction is dispatched |
US6098167A (en) * | 1997-03-31 | 2000-08-01 | International Business Machines Corporation | Apparatus and method for fast unified interrupt recovery and branch recovery in processors supporting out-of-order execution |
US5913048A (en) * | 1997-03-31 | 1999-06-15 | International Business Machines Corporation | Dispatching instructions in a processor supporting out-of-order execution |
US5887161A (en) * | 1997-03-31 | 1999-03-23 | International Business Machines Corporation | Issuing instructions in a processor supporting out-of-order execution |
US5987598A (en) * | 1997-07-07 | 1999-11-16 | International Business Machines Corporation | Method and system for tracking instruction progress within a data processing system |
US6128728A (en) | 1997-08-01 | 2000-10-03 | Micron Technology, Inc. | Virtual shadow registers and virtual register windows |
US5901299A (en) * | 1997-09-19 | 1999-05-04 | International Business Machines Corporation | Method and apparatus for transferring data between buses having differing ordering policies |
US5938753A (en) * | 1997-09-19 | 1999-08-17 | International Business Machines Corporation | Method and apparatus for controlling autonomous units transferring data between buses having different ordering policies |
US6016526A (en) * | 1997-09-19 | 2000-01-18 | International Business Machines Corporation | Method and apparatus for transferring data between buses having differing ordering policies via the use of autonomous units |
US5961636A (en) * | 1997-09-22 | 1999-10-05 | International Business Machines Corporation | Checkpoint table for selective instruction flushing in a speculative execution unit |
US6065110A (en) * | 1998-02-09 | 2000-05-16 | International Business Machines Corporation | Method and apparatus for loading an instruction buffer of a processor capable of out-of-order instruction issue |
US6061785A (en) * | 1998-02-17 | 2000-05-09 | International Business Machines Corporation | Data processing system having an apparatus for out-of-order register operations and method therefor |
US6067644A (en) * | 1998-04-15 | 2000-05-23 | International Business Machines Corporation | System and method monitoring instruction progress within a processor |
US6212619B1 (en) | 1998-05-11 | 2001-04-03 | International Business Machines Corporation | System and method for high-speed register renaming by counting |
US6134645A (en) * | 1998-06-01 | 2000-10-17 | International Business Machines Corporation | Instruction completion logic distributed among execution units for improving completion efficiency |
US6324640B1 (en) * | 1998-06-30 | 2001-11-27 | International Business Machines Corporation | System and method for dispatching groups of instructions using pipelined register renaming |
US6243786B1 (en) * | 1998-12-23 | 2001-06-05 | Industrial Technology Research Institute | Apparatus and method for generating an interrupt prohibited zone in pipelined data processors |
US7191309B1 (en) | 1999-09-01 | 2007-03-13 | Intel Corporation | Double shift instruction for micro engine used in multithreaded parallel processor architecture |
EP1236092A4 (de) | 1999-09-01 | 2006-07-26 | Intel Corp | Verzweigungsbefehl für einen prozessor |
WO2001016702A1 (en) | 1999-09-01 | 2001-03-08 | Intel Corporation | Register set used in multithreaded parallel processor architecture |
US7681018B2 (en) * | 2000-08-31 | 2010-03-16 | Intel Corporation | Method and apparatus for providing large register address space while maximizing cycletime performance for a multi-threaded register file set |
US20020053017A1 (en) * | 2000-09-01 | 2002-05-02 | Adiletta Matthew J. | Register instructions for a multithreaded processor |
JP3817436B2 (ja) | 2000-09-28 | 2006-09-06 | 株式会社東芝 | プロセッサおよびリネーミング装置 |
US6671794B1 (en) * | 2000-10-02 | 2003-12-30 | International Business Machines Corporation | Address generation interlock detection |
US7020871B2 (en) * | 2000-12-21 | 2006-03-28 | Intel Corporation | Breakpoint method for parallel hardware threads in multithreaded processor |
US7191315B2 (en) | 2001-06-04 | 2007-03-13 | Sun Microsystems, Inc. | Method and system for tracking and recycling physical register assignment |
US7487505B2 (en) | 2001-08-27 | 2009-02-03 | Intel Corporation | Multithreaded microprocessor with register allocation based on number of active threads |
US7225281B2 (en) * | 2001-08-27 | 2007-05-29 | Intel Corporation | Multiprocessor infrastructure for providing flexible bandwidth allocation via multiple instantiations of separate data buses, control buses and support mechanisms |
US6868476B2 (en) | 2001-08-27 | 2005-03-15 | Intel Corporation | Software controlled content addressable memory in a general purpose execution datapath |
US7216204B2 (en) | 2001-08-27 | 2007-05-08 | Intel Corporation | Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment |
US7610451B2 (en) * | 2002-01-25 | 2009-10-27 | Intel Corporation | Data transfer mechanism using unidirectional pull bus and push bus |
US7437724B2 (en) * | 2002-04-03 | 2008-10-14 | Intel Corporation | Registers for data transfers |
US7337275B2 (en) * | 2002-08-13 | 2008-02-26 | Intel Corporation | Free list and ring data structure management |
US6941438B2 (en) | 2003-01-10 | 2005-09-06 | Intel Corporation | Memory interleaving |
US7272701B2 (en) * | 2003-10-22 | 2007-09-18 | Intel Corporation | Method and apparatus for limiting ports in a register alias table having high-bandwidth and low-bandwidth structures |
US7478276B2 (en) * | 2005-02-10 | 2009-01-13 | International Business Machines Corporation | Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor |
US7409589B2 (en) * | 2005-05-27 | 2008-08-05 | International Business Machines Corporation | Method and apparatus for reducing number of cycles required to checkpoint instructions in a multi-threaded processor |
US7873625B2 (en) * | 2006-09-18 | 2011-01-18 | International Business Machines Corporation | File indexing framework and symbolic name maintenance framework |
US20080242560A1 (en) * | 2006-11-21 | 2008-10-02 | Gunderson Kevin L | Methods for generating amplified nucleic acid arrays |
US8677050B2 (en) * | 2010-11-12 | 2014-03-18 | International Business Machines Corporation | System, method and computer program product for extending a cache using processor registers |
US9072325B2 (en) | 2012-08-30 | 2015-07-07 | Shelby Group International, Inc. | Glove finger attachment system |
US9588770B2 (en) | 2013-03-15 | 2017-03-07 | Samsung Electronics Co., Ltd. | Dynamic rename based register reconfiguration of a vector register file |
US9510628B2 (en) | 2013-03-15 | 2016-12-06 | Shelby Group International, Inc. | Glove thermal protection system |
CN104598201A (zh) * | 2013-10-31 | 2015-05-06 | 国际商业机器公司 | 指令性能分析的方法和设备 |
US10216523B2 (en) | 2015-07-17 | 2019-02-26 | General Electric Company | Systems and methods for implementing control logic |
CN107329936A (zh) * | 2016-04-29 | 2017-11-07 | 北京中科寒武纪科技有限公司 | 一种用于执行神经网络运算以及矩阵/向量运算的装置和方法 |
US10694795B2 (en) | 2017-01-10 | 2020-06-30 | Shelby Group International, Inc. | Glove construction |
US11966328B2 (en) * | 2020-12-18 | 2024-04-23 | Advanced Micro Devices, Inc. | Near-memory determination of registers |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3346851A (en) * | 1964-07-08 | 1967-10-10 | Control Data Corp | Simultaneous multiprocessing computer system |
US4574349A (en) * | 1981-03-30 | 1986-03-04 | International Business Machines Corp. | Apparatus for addressing a larger number of instruction addressable central processor registers than can be identified by a program instruction |
US4807115A (en) * | 1983-10-07 | 1989-02-21 | Cornell Research Foundation, Inc. | Instruction issuing mechanism for processors with multiple functional units |
US4847755A (en) * | 1985-10-31 | 1989-07-11 | Mcc Development, Ltd. | Parallel processing method and apparatus for increasing processing throughout by parallel processing low level instructions having natural concurrencies |
US4903196A (en) * | 1986-05-02 | 1990-02-20 | International Business Machines Corporation | Method and apparatus for guaranteeing the logical integrity of data in the general purpose registers of a complex multi-execution unit uniprocessor |
US4992938A (en) | 1987-07-01 | 1991-02-12 | International Business Machines Corporation | Instruction control mechanism for a computing system with register renaming, map table and queues indicating available registers |
US5134561A (en) * | 1987-07-20 | 1992-07-28 | International Business Machines Corporation | Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries |
US4901233A (en) * | 1987-07-20 | 1990-02-13 | International Business Machines Corporation | Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries |
US4972470A (en) * | 1987-08-06 | 1990-11-20 | Steven Farago | Programmable connector |
EP0312764A3 (de) * | 1987-10-19 | 1991-04-10 | International Business Machines Corporation | Datenprozessor mit mehrfachen Ausführungseinheiten zur parallelen Ausführung von mehreren Befehlsklassen |
US5155817A (en) * | 1988-04-01 | 1992-10-13 | Kabushiki Kaisha Toshiba | Microprocessor |
US5487156A (en) * | 1989-12-15 | 1996-01-23 | Popescu; Valeri | Processor architecture having independently fetching issuing and updating operations of instructions which are sequentially assigned and stored in order fetched |
US5280615A (en) * | 1990-03-23 | 1994-01-18 | Unisys Corporation | Out of order job processing method and apparatus |
US5197132A (en) * | 1990-06-29 | 1993-03-23 | Digital Equipment Corporation | Register mapping system having a log containing sequential listing of registers that were changed in preceding cycles for precise post-branch recovery |
JPH0480824A (ja) * | 1990-07-23 | 1992-03-13 | Nec Corp | データ処理装置 |
US5261071A (en) * | 1991-03-21 | 1993-11-09 | Control Data System, Inc. | Dual pipe cache memory with out-of-order issue capability |
US5355457A (en) * | 1991-05-21 | 1994-10-11 | Motorola, Inc. | Data processor for performing simultaneous instruction retirement and backtracking |
US5386562A (en) * | 1992-05-13 | 1995-01-31 | Mips Computer Systems, Inc. | Circular scheduling method and apparatus for executing computer programs by moving independent instructions out of a loop |
-
1993
- 1993-03-19 US US08/034,193 patent/US5481683A/en not_active Expired - Fee Related
- 1993-06-15 CA CA002098414A patent/CA2098414C/en not_active Expired - Fee Related
- 1993-09-08 TW TW082107359A patent/TW306987B/zh not_active IP Right Cessation
- 1993-09-28 KR KR1019930020072A patent/KR970004509B1/ko not_active IP Right Cessation
- 1993-10-25 JP JP5265946A patent/JP2698033B2/ja not_active Expired - Fee Related
- 1993-10-28 CN CN93119608A patent/CN1053508C/zh not_active Expired - Fee Related
- 1993-11-01 DE DE69327637T patent/DE69327637T2/de not_active Expired - Fee Related
- 1993-11-01 EP EP93308705A patent/EP0600611B1/de not_active Expired - Lifetime
- 1993-11-01 AT AT93308705T patent/ATE189071T1/de not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR940009820A (ko) | 1994-05-24 |
EP0600611A3 (de) | 1995-01-11 |
EP0600611A2 (de) | 1994-06-08 |
CN1053508C (zh) | 2000-06-14 |
KR970004509B1 (ko) | 1997-03-28 |
ATE189071T1 (de) | 2000-02-15 |
CN1105138A (zh) | 1995-07-12 |
DE69327637T2 (de) | 2000-07-06 |
US5481683A (en) | 1996-01-02 |
CA2098414C (en) | 1997-05-13 |
JP2698033B2 (ja) | 1998-01-19 |
TW306987B (de) | 1997-06-01 |
CA2098414A1 (en) | 1994-05-01 |
EP0600611B1 (de) | 2000-01-19 |
JPH06214784A (ja) | 1994-08-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8339 | Ceased/non-payment of the annual fee |