DE69300918D1 - Verfahren zur Herstellung eines Aluminiumkontakts. - Google Patents

Verfahren zur Herstellung eines Aluminiumkontakts.

Info

Publication number
DE69300918D1
DE69300918D1 DE69300918T DE69300918T DE69300918D1 DE 69300918 D1 DE69300918 D1 DE 69300918D1 DE 69300918 T DE69300918 T DE 69300918T DE 69300918 T DE69300918 T DE 69300918T DE 69300918 D1 DE69300918 D1 DE 69300918D1
Authority
DE
Germany
Prior art keywords
making
aluminum contact
aluminum
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69300918T
Other languages
English (en)
Other versions
DE69300918T2 (de
Inventor
Fusen E Chen
Fu-Tai Liou
Girish A Dixit
Che-Chia Wei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
SGS Thomson Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics Inc filed Critical SGS Thomson Microelectronics Inc
Application granted granted Critical
Publication of DE69300918D1 publication Critical patent/DE69300918D1/de
Publication of DE69300918T2 publication Critical patent/DE69300918T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684—Smoothing; Planarisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
DE1993600918 1992-01-21 1993-01-15 Verfahren zur Herstellung eines Aluminiumkontakts. Expired - Fee Related DE69300918T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US82423892A 1992-01-21 1992-01-21

Publications (2)

Publication Number Publication Date
DE69300918D1 true DE69300918D1 (de) 1996-01-18
DE69300918T2 DE69300918T2 (de) 1996-04-25

Family

ID=25240922

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1993600918 Expired - Fee Related DE69300918T2 (de) 1992-01-21 1993-01-15 Verfahren zur Herstellung eines Aluminiumkontakts.

Country Status (3)

Country Link
EP (1) EP0552893B1 (de)
JP (1) JP3426274B2 (de)
DE (1) DE69300918T2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0954024A1 (de) * 1998-04-30 1999-11-03 Interuniversitair Micro-Elektronica Centrum Vzw Verfahren zum Füllen einer Öffnung in einer Isolierschicht

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4721689A (en) * 1986-08-28 1988-01-26 International Business Machines Corporation Method for simultaneously forming an interconnection level and via studs
US5108570A (en) * 1990-03-30 1992-04-28 Applied Materials, Inc. Multistep sputtering process for forming aluminum layer over stepped semiconductor wafer

Also Published As

Publication number Publication date
EP0552893A1 (de) 1993-07-28
DE69300918T2 (de) 1996-04-25
EP0552893B1 (de) 1995-12-06
JPH05267215A (ja) 1993-10-15
JP3426274B2 (ja) 2003-07-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee