DE69231172T2 - Datenspeicher und bildverarbeitungssystem mit einem solchen datenspeicher - Google Patents

Datenspeicher und bildverarbeitungssystem mit einem solchen datenspeicher

Info

Publication number
DE69231172T2
DE69231172T2 DE69231172T DE69231172T DE69231172T2 DE 69231172 T2 DE69231172 T2 DE 69231172T2 DE 69231172 T DE69231172 T DE 69231172T DE 69231172 T DE69231172 T DE 69231172T DE 69231172 T2 DE69231172 T2 DE 69231172T2
Authority
DE
Germany
Prior art keywords
data storage
image processing
processing system
storage
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69231172T
Other languages
English (en)
Other versions
DE69231172D1 (de
Inventor
Katsutoshi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of DE69231172D1 publication Critical patent/DE69231172D1/de
Application granted granted Critical
Publication of DE69231172T2 publication Critical patent/DE69231172T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/123—Frame memory handling using interleaving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Input (AREA)
DE69231172T 1991-01-23 1992-01-23 Datenspeicher und bildverarbeitungssystem mit einem solchen datenspeicher Expired - Fee Related DE69231172T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP624991 1991-01-23
PCT/JP1992/000054 WO1992013314A1 (en) 1991-01-23 1992-01-23 Image controller

Publications (2)

Publication Number Publication Date
DE69231172D1 DE69231172D1 (de) 2000-07-20
DE69231172T2 true DE69231172T2 (de) 2001-03-08

Family

ID=11633218

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69231172T Expired - Fee Related DE69231172T2 (de) 1991-01-23 1992-01-23 Datenspeicher und bildverarbeitungssystem mit einem solchen datenspeicher

Country Status (4)

Country Link
US (1) US5742281A (de)
EP (1) EP0522178B1 (de)
DE (1) DE69231172T2 (de)
WO (1) WO1992013314A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2919774B2 (ja) * 1994-07-01 1999-07-19 ディジタル イクイプメント コーポレイション 深いフレームバッファにおいて浅いピクセルを迅速に指示してコピーする方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5540950B2 (de) * 1974-11-30 1980-10-21
US4482979A (en) * 1982-02-04 1984-11-13 May George A Video computing system with automatically refreshed memory
JPS5955556A (ja) * 1982-09-25 1984-03-30 Toshiba Corp メモリアクセス方式
JPS5960487A (ja) * 1982-09-29 1984-04-06 フアナツク株式会社 カラ−デイスプレイ装置
JPS5984289A (ja) * 1982-11-06 1984-05-15 ブラザー工業株式会社 画像信号出力装置
US4609917A (en) * 1983-01-17 1986-09-02 Lexidata Corporation Three-dimensional display system
US4634970A (en) * 1983-12-30 1987-01-06 Norland Corporation Digital waveform processing oscilloscope with distributed data multiple plane display system
US4818979A (en) * 1986-02-28 1989-04-04 Prime Computer, Inc. LUT output for graphics display
JPH0727558B2 (ja) * 1987-10-23 1995-03-29 松下電器産業株式会社 画像メモリ装置
JPH02250183A (ja) * 1989-03-23 1990-10-05 Daikin Ind Ltd 図形描画装置におけるメモリとのインターフェース方法およびその装置
US5349372A (en) * 1993-07-16 1994-09-20 Pellucid Inc. Video subsystems utilizing asymmetrical column interleaving

Also Published As

Publication number Publication date
EP0522178A1 (de) 1993-01-13
DE69231172D1 (de) 2000-07-20
EP0522178A4 (de) 1994-02-02
EP0522178B1 (de) 2000-06-14
WO1992013314A1 (en) 1992-08-06
US5742281A (en) 1998-04-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee