DE69217404D1 - Synchroner Dekodierer für selbsttaktierende Signale - Google Patents

Synchroner Dekodierer für selbsttaktierende Signale

Info

Publication number
DE69217404D1
DE69217404D1 DE69217404T DE69217404T DE69217404D1 DE 69217404 D1 DE69217404 D1 DE 69217404D1 DE 69217404 T DE69217404 T DE 69217404T DE 69217404 T DE69217404 T DE 69217404T DE 69217404 D1 DE69217404 D1 DE 69217404D1
Authority
DE
Germany
Prior art keywords
self
clocking signals
synchronous decoder
decoder
synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69217404T
Other languages
English (en)
Other versions
DE69217404T2 (de
Inventor
Willem Engelse
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of DE69217404D1 publication Critical patent/DE69217404D1/de
Application granted granted Critical
Publication of DE69217404T2 publication Critical patent/DE69217404T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/068Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection by sampling faster than the nominal bit rate
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Dc Digital Transmission (AREA)
DE69217404T 1991-04-08 1992-04-07 Synchroner Dekodierer für selbsttaktierende Signale Expired - Fee Related DE69217404T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/682,059 US5287359A (en) 1991-04-08 1991-04-08 Synchronous decoder for self-clocking signals

Publications (2)

Publication Number Publication Date
DE69217404D1 true DE69217404D1 (de) 1997-03-27
DE69217404T2 DE69217404T2 (de) 1997-09-11

Family

ID=24738025

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69217404T Expired - Fee Related DE69217404T2 (de) 1991-04-08 1992-04-07 Synchroner Dekodierer für selbsttaktierende Signale

Country Status (4)

Country Link
US (1) US5287359A (de)
EP (1) EP0508885B1 (de)
JP (1) JPH0646044A (de)
DE (1) DE69217404T2 (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0562183A1 (de) * 1992-03-27 1993-09-29 ALCATEL BELL Naamloze Vennootschap Synchronisierungsverfahren und Anordnung zur Herstellung des Verfahren
US5648776A (en) * 1993-04-30 1997-07-15 International Business Machines Corporation Serial-to-parallel converter using alternating latches and interleaving techniques
US5715278A (en) * 1993-05-11 1998-02-03 Ericsson Inc. Standby power saving in mobile phones
GB9403724D0 (en) * 1994-02-25 1994-04-13 Texas Instruments Ltd A method and apparatus for receiving a data signal and a digital filter circuit
US5533058A (en) * 1994-03-10 1996-07-02 Delco Electronics Corporation Method and apparatus for low current RF signal detection
US5714904A (en) * 1994-06-06 1998-02-03 Sun Microsystems, Inc. High speed serial link for fully duplexed data communication
FR2725096B1 (fr) * 1994-09-28 1996-12-13 Valeo Electronique Procede d'acquisition et de decodage de donnees numeriques et telecommande radiofrequence le mettant en oeuvre
JP2000115263A (ja) * 1998-09-30 2000-04-21 Matsushita Electric Ind Co Ltd ディジタル放送復調装置
US6839856B1 (en) * 2000-07-20 2005-01-04 Silicon Graphics, Inc. Method and circuit for reliable data capture in the presence of bus-master changeovers
US7333516B1 (en) 2000-07-20 2008-02-19 Silicon Graphics, Inc. Interface for synchronous data transfer between domains clocked at different frequencies
TW513856B (en) * 2001-04-16 2002-12-11 Realtek Semiconductor Corp Data recovery device and method
US7613402B2 (en) 2003-12-08 2009-11-03 Alcatel-Lucent Usa Inc. Duobinary receiver
US7643761B2 (en) 2004-02-19 2010-01-05 Alcatel-Lucent Usa Inc. Method and apparatus for processing optical duobinary signals
US7330669B2 (en) 2004-04-20 2008-02-12 Lucent Technologies Inc. Optical heterodyne receiver based on oversampling
US7358871B2 (en) * 2006-08-25 2008-04-15 Freescale Semiconductor, Inc. Method and system for decoding data
US8553814B2 (en) * 2009-07-31 2013-10-08 Lsi Corporation Rapid sampling phase recovery
US9098383B1 (en) * 2009-09-23 2015-08-04 Nvidia Corporation Consolidated crossbar that supports a multitude of traffic types
US9614661B2 (en) * 2012-04-09 2017-04-04 Atmel Corporation Differential interface for inter-device communication in a battery management and protection system
CN114666030B (zh) * 2022-05-25 2022-08-26 华中科技大学 一种混合井下信号编码与解码方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3820031A (en) * 1973-07-25 1974-06-25 Us Navy Method and apparatus for decoding a manchester waveform
CA1063719A (en) * 1975-04-28 1979-10-02 Control Data Corporation Phase locked loop decoder
US4012598A (en) * 1976-01-14 1977-03-15 Bell Telephone Laboratories, Incorporated Method and means for pulse receiver synchronization
US4080572A (en) * 1976-11-24 1978-03-21 Westinghouse Electric Corporation Receiver and method for synchronizing and detecting coded waveforms
US4361895A (en) * 1980-07-28 1982-11-30 Ontel Corporation Manchester decoder
US4450572A (en) * 1982-05-07 1984-05-22 Digital Equipment Corporation Interface for serial data communications link
EP0121750B1 (de) * 1983-03-11 1987-03-18 Alcatel Taktrückgewinnungschaltung für eine eine Kombination des Biphase-L und des modifizierten Biphase-Kodes verwendende synchrone Datenübertragung
US4525848A (en) * 1983-06-02 1985-06-25 Prutec Limited Manchester decoder
US4584695A (en) * 1983-11-09 1986-04-22 National Semiconductor Corporation Digital PLL decoder
US4577163A (en) * 1984-07-09 1986-03-18 Honeywell Inc. Digital phase locked loop
US4608702A (en) * 1984-12-21 1986-08-26 Advanced Micro Devices, Inc. Method for digital clock recovery from Manchester-encoded signals
US4653075A (en) * 1985-03-29 1987-03-24 Ford Aerospace & Communications Corp. BPSK synchronizer using computational analysis
GB8606028D0 (en) * 1986-03-12 1986-04-16 Int Computers Ltd Decoder
JPS6315530A (ja) * 1986-07-08 1988-01-22 Sumitomo Electric Ind Ltd デイジタル位相同期ル−プ
US4756011A (en) * 1986-12-24 1988-07-05 Bell Communications Research, Inc. Digital phase aligner
US4821297A (en) * 1987-11-19 1989-04-11 American Telephone And Telegraph Company, At&T Bell Laboratories Digital phase locked loop clock recovery scheme
US4862482A (en) * 1988-06-16 1989-08-29 National Semiconductor Corporation Receiver for Manchester encoded data
GB8903567D0 (en) * 1989-02-16 1989-04-05 British Telecomm An optical network
DE68919211T2 (de) * 1989-03-29 1995-05-11 Ibm Empfänger für seriellen Daten.

Also Published As

Publication number Publication date
JPH0646044A (ja) 1994-02-18
US5287359A (en) 1994-02-15
EP0508885A2 (de) 1992-10-14
EP0508885A3 (en) 1993-06-02
EP0508885B1 (de) 1997-02-12
DE69217404T2 (de) 1997-09-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee