DE69100176D1 - Impulsformerschaltung. - Google Patents
Impulsformerschaltung.Info
- Publication number
- DE69100176D1 DE69100176D1 DE9191119190T DE69100176T DE69100176D1 DE 69100176 D1 DE69100176 D1 DE 69100176D1 DE 9191119190 T DE9191119190 T DE 9191119190T DE 69100176 T DE69100176 T DE 69100176T DE 69100176 D1 DE69100176 D1 DE 69100176D1
- Authority
- DE
- Germany
- Prior art keywords
- pulse shifting
- shifting
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31922—Timing generation or clock distribution
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31919—Storing and outputting test patterns
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31928—Formatter
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP91119190A EP0541840B1 (de) | 1991-11-11 | 1991-11-11 | Impulsformerschaltung |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69100176D1 true DE69100176D1 (de) | 1993-08-19 |
DE69100176T2 DE69100176T2 (de) | 1993-10-28 |
Family
ID=8207325
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE91119190T Expired - Fee Related DE69100176T2 (de) | 1991-11-11 | 1991-11-11 | Impulsformerschaltung. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5293079A (de) |
EP (1) | EP0541840B1 (de) |
JP (1) | JP3130386B2 (de) |
DE (1) | DE69100176T2 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69326003T2 (de) * | 1993-09-20 | 1999-11-25 | Hewlett-Packard Gmbh | Testapparat zum Testen und Handhaben einer Vielzahl von Vorrichtungen |
DE69326004T2 (de) * | 1993-09-20 | 1999-11-25 | Hewlett-Packard Gmbh | Testapparat mit grosser Kapazität |
JP3157681B2 (ja) * | 1994-06-27 | 2001-04-16 | 日本電気株式会社 | 論理データ入力ラッチ回路 |
US5537062A (en) * | 1995-06-07 | 1996-07-16 | Ast Research, Inc. | Glitch-free clock enable circuit |
EP0899878B1 (de) * | 1997-08-29 | 2003-11-05 | STMicroelectronics S.r.l. | Kippschaltung mit reduzierter Integrationsfläche |
US6275962B1 (en) | 1998-10-23 | 2001-08-14 | Teradyne, Inc. | Remote test module for automatic test equipment |
JP4757365B2 (ja) * | 1999-09-28 | 2011-08-24 | 株式会社アドバンテスト | 波形フォーマッタ・この波形フォーマッタを搭載した半導体デバイス試験装置 |
JP3537087B2 (ja) | 2000-09-29 | 2004-06-14 | Necエレクトロニクス株式会社 | 半導体装置及び半導体装置の検査方法 |
DE10219119A1 (de) * | 2002-04-29 | 2003-11-13 | Infineon Technologies Ag | Über ein Taktsignal geteuertes Flipflop, Verfahren zum Durchschalten eines Signals durch ein Flipflop, Verwendung eines Flipflops sowie eine Takt-Sperrschaltung |
US6771061B2 (en) * | 2002-09-17 | 2004-08-03 | Teradyne, Inc. | High speed tester with narrow output pulses |
US6856184B2 (en) * | 2003-01-15 | 2005-02-15 | Agilent Technologies, Inc | Clock divider circuit |
US7856578B2 (en) * | 2005-09-23 | 2010-12-21 | Teradyne, Inc. | Strobe technique for test of digital signal timing |
US7573957B2 (en) | 2005-09-23 | 2009-08-11 | Teradyne, Inc. | Strobe technique for recovering a clock in a digital signal |
US7574632B2 (en) * | 2005-09-23 | 2009-08-11 | Teradyne, Inc. | Strobe technique for time stamping a digital signal |
DE102005046981B4 (de) * | 2005-09-30 | 2010-04-15 | Qimonda Ag | Speicher und Verfahren zum Verbessern der Zuverlässigkeit eines Speichers mit einem benutzten Speicherbereich und einem unbenutzten Speicherbereich |
US7378854B2 (en) * | 2005-10-28 | 2008-05-27 | Teradyne, Inc. | Dual sine-wave time stamp method and apparatus |
US7593497B2 (en) * | 2005-10-31 | 2009-09-22 | Teradyne, Inc. | Method and apparatus for adjustment of synchronous clock signals |
KR100892296B1 (ko) * | 2007-10-24 | 2009-04-08 | 주식회사 아이티엔티 | 반도체 테스트 패턴신호의 체배 장치 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3670249A (en) * | 1971-05-06 | 1972-06-13 | Rca Corp | Sampling decoder for delay modulation signals |
JPS5338952B2 (de) * | 1973-07-09 | 1978-10-18 | ||
JPS5180755A (de) * | 1975-01-10 | 1976-07-14 | Kokusai Denshin Denwa Co Ltd | |
US4002933A (en) * | 1975-02-18 | 1977-01-11 | Texas Instruments Incorporated | Five gate flip-flop |
US4045693A (en) * | 1976-07-08 | 1977-08-30 | Gte Automatic Electric Laboratories Incorporated | Negative r-s triggered latch |
US4267514A (en) * | 1979-02-16 | 1981-05-12 | The United States Of America As Represented By The Secretary Of The Air Force | Digital phase-frequency detector |
JPS60126778A (ja) * | 1983-12-13 | 1985-07-06 | Fuji Electric Corp Res & Dev Ltd | 光センサアレイの信号変換回路 |
US4677318A (en) * | 1985-04-12 | 1987-06-30 | Altera Corporation | Programmable logic storage element for programmable logic devices |
JPS61253918A (ja) * | 1985-05-02 | 1986-11-11 | Fujitsu Ltd | 論理回路 |
US4980577A (en) * | 1987-06-18 | 1990-12-25 | Advanced Micro Devices, Inc. | Dual triggered edge-sensitive asynchrounous flip-flop |
DE3860705D1 (de) * | 1988-01-28 | 1990-10-31 | Hewlett Packard Gmbh | Erkennungsschaltung fuer binaersignalzustandswechsel. |
JP2688366B2 (ja) * | 1989-03-20 | 1997-12-10 | 富士通株式会社 | 論理回路 |
US4891028A (en) * | 1989-04-11 | 1990-01-02 | Zenith Electronics Corporation | Shielding means and process for use in the manufacture of tension mask color cathode ray tubes |
US5001374A (en) * | 1989-09-08 | 1991-03-19 | Amp Incorporated | Digital filter for removing short duration noise |
US5159279A (en) * | 1990-11-27 | 1992-10-27 | Dsc Communications Corporation | Apparatus and method for detecting out-of-lock condition in a phase lock loop |
US5180933A (en) * | 1991-11-26 | 1993-01-19 | Honeywell Inc. | Programmable digital out-of-lock detector |
-
1991
- 1991-11-11 EP EP91119190A patent/EP0541840B1/de not_active Expired - Lifetime
- 1991-11-11 DE DE91119190T patent/DE69100176T2/de not_active Expired - Fee Related
-
1992
- 1992-10-22 US US07/964,772 patent/US5293079A/en not_active Expired - Lifetime
- 1992-11-11 JP JP04300834A patent/JP3130386B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0541840A1 (de) | 1993-05-19 |
DE69100176T2 (de) | 1993-10-28 |
US5293079A (en) | 1994-03-08 |
EP0541840B1 (de) | 1993-07-14 |
JPH05223899A (ja) | 1993-09-03 |
JP3130386B2 (ja) | 2001-01-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: AGILENT TECHNOLOGIES DEUTSCHLAND GMBH, 71034 BOEBL |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: VERIGY (SINGAPORE) PTE. LTD., SINGAPORE, SG |
|
8339 | Ceased/non-payment of the annual fee |