DE69031639D1 - Synchronisiereinrichtung, welche Taktphasenextrapolation verwendet - Google Patents

Synchronisiereinrichtung, welche Taktphasenextrapolation verwendet

Info

Publication number
DE69031639D1
DE69031639D1 DE69031639T DE69031639T DE69031639D1 DE 69031639 D1 DE69031639 D1 DE 69031639D1 DE 69031639 T DE69031639 T DE 69031639T DE 69031639 T DE69031639 T DE 69031639T DE 69031639 D1 DE69031639 D1 DE 69031639D1
Authority
DE
Germany
Prior art keywords
synchronizer
clock phase
uses clock
phase extrapolation
extrapolation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69031639T
Other languages
English (en)
Other versions
DE69031639T2 (de
Inventor
David James
Steven Mangelsdorff
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Development Co LP
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of DE69031639D1 publication Critical patent/DE69031639D1/de
Application granted granted Critical
Publication of DE69031639T2 publication Critical patent/DE69031639T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Information Transfer Systems (AREA)
  • Logic Circuits (AREA)
DE69031639T 1989-07-24 1990-06-22 Synchronisiereinrichtung, welche Taktphasenextrapolation verwendet Expired - Fee Related DE69031639T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/384,588 US5008904A (en) 1989-07-24 1989-07-24 Synchronizer using clock phase extrapolation

Publications (2)

Publication Number Publication Date
DE69031639D1 true DE69031639D1 (de) 1997-12-04
DE69031639T2 DE69031639T2 (de) 1998-02-19

Family

ID=23517919

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69031639T Expired - Fee Related DE69031639T2 (de) 1989-07-24 1990-06-22 Synchronisiereinrichtung, welche Taktphasenextrapolation verwendet

Country Status (4)

Country Link
US (1) US5008904A (de)
EP (1) EP0411759B1 (de)
JP (1) JP3194473B2 (de)
DE (1) DE69031639T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI85318C (fi) * 1990-08-14 1992-03-25 Tecnomen Oy Kompensering av felet i en klockas gaong.
US5440557A (en) * 1993-12-21 1995-08-08 National Semiconductor Corporation Apparatus and methods for providing an interface between FDDI-II rings
US5548620A (en) * 1994-04-20 1996-08-20 Sun Microsystems, Inc. Zero latency synchronized method and apparatus for system having at least two clock domains
US5798667A (en) * 1994-05-16 1998-08-25 At&T Global Information Solutions Company Method and apparatus for regulation of power dissipation
WO1997006491A1 (en) * 1995-08-10 1997-02-20 International Business Machines Corporation Synchronizing logic avoiding metastability
US7363401B1 (en) * 1997-12-15 2008-04-22 Intel Corporation Method and apparatus for controlling bus transactions depending on bus clock frequency
JP3592547B2 (ja) 1998-09-04 2004-11-24 株式会社ルネサステクノロジ 情報処理装置および信号転送方法
US6481939B1 (en) 2001-08-24 2002-11-19 Robb S. Gillespie Tool tip conductivity contact sensor and method
DE102005056709A1 (de) * 2005-11-28 2007-06-06 Siemens Ag Verfahren und Vorrichtung zur Kopplung mindestens zweier unabhängiger Bussysteme
US7996701B2 (en) * 2008-02-13 2011-08-09 Integrated Device Technologies, Inc. Automated clock relationship detection
JP5483172B2 (ja) * 2009-10-19 2014-05-07 横河電機株式会社 データ転送装置およびデータ転送方法
US8582706B2 (en) * 2009-10-29 2013-11-12 National Instruments Corporation Training a data path for parallel data transfer

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2075310A (en) * 1980-04-30 1981-11-11 Hewlett Packard Ltd Bus extender circuitry for data transmission
CA1266720A (en) * 1985-09-27 1990-03-13 Rasmus Nordby Synchronizing system
SE452937B (sv) * 1986-04-18 1987-12-21 Ericsson Telefon Ab L M Sett och anordning for att overfora data mellan tva datautrustningar som drivs av var sin oberoende klocka
NZ220548A (en) * 1986-06-18 1990-05-28 Fujitsu Ltd Tdm frame synchronising circuit
US4815109A (en) * 1987-06-25 1989-03-21 Racal Data Communications Inc. Sampling clock synchronization

Also Published As

Publication number Publication date
EP0411759A3 (en) 1992-10-28
JP3194473B2 (ja) 2001-07-30
EP0411759B1 (de) 1997-10-29
EP0411759A2 (de) 1991-02-06
JPH0358263A (ja) 1991-03-13
US5008904A (en) 1991-04-16
DE69031639T2 (de) 1998-02-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD CO. (N.D.GES.D.STAATES DELAWARE),

8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, TE

8339 Ceased/non-payment of the annual fee