DE69027516T2 - Pufferschaltung - Google Patents

Pufferschaltung

Info

Publication number
DE69027516T2
DE69027516T2 DE69027516T DE69027516T DE69027516T2 DE 69027516 T2 DE69027516 T2 DE 69027516T2 DE 69027516 T DE69027516 T DE 69027516T DE 69027516 T DE69027516 T DE 69027516T DE 69027516 T2 DE69027516 T2 DE 69027516T2
Authority
DE
Germany
Prior art keywords
buffer circuit
buffer
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69027516T
Other languages
English (en)
Other versions
DE69027516D1 (de
Inventor
Atsushi Ohba
Shigeki Ohbayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of DE69027516D1 publication Critical patent/DE69027516D1/de
Publication of DE69027516T2 publication Critical patent/DE69027516T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017509—Interface arrangements
    • H03K19/017518—Interface arrangements using a combination of bipolar and field effect transistors [BIFET]
    • H03K19/017527—Interface arrangements using a combination of bipolar and field effect transistors [BIFET] with at least one differential stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
DE69027516T 1989-12-14 1990-12-13 Pufferschaltung Expired - Fee Related DE69027516T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP32628489 1989-12-14
JP2160214A JPH03224316A (ja) 1989-12-14 1990-06-18 半導体集積回路

Publications (2)

Publication Number Publication Date
DE69027516D1 DE69027516D1 (de) 1996-07-25
DE69027516T2 true DE69027516T2 (de) 1996-11-21

Family

ID=26486770

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69027516T Expired - Fee Related DE69027516T2 (de) 1989-12-14 1990-12-13 Pufferschaltung

Country Status (5)

Country Link
US (1) US5148060A (de)
EP (1) EP0433062B1 (de)
JP (1) JPH03224316A (de)
DE (1) DE69027516T2 (de)
HK (1) HK61797A (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5023479A (en) * 1990-07-31 1991-06-11 Motorola, Inc. Low power output gate
US5202594A (en) * 1992-02-04 1993-04-13 Motorola, Inc. Low power level converter
WO2002073805A1 (en) * 2001-03-14 2002-09-19 Koninklijke Philips Electronics N.V. A current mode device and a communication arrangement comprising current mode devices

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3549899A (en) * 1967-03-31 1970-12-22 Rca Corp Input and output emitter-follower cml circuitry
JPS5395563A (en) * 1977-02-02 1978-08-21 Hitachi Ltd Semiconductor circuit
JPS59115620A (ja) * 1982-12-22 1984-07-04 Mitsubishi Electric Corp 論理回路装置
US4605864A (en) * 1985-01-04 1986-08-12 Advanced Micro Devices, Inc. AFL (advanced fast logic) line driver circuit
JP2544343B2 (ja) * 1985-02-07 1996-10-16 株式会社日立製作所 半導体集積回路装置
JP2523480B2 (ja) * 1985-11-15 1996-08-07 株式会社東芝 パツフア形ガスしや断器
US4682054A (en) * 1986-06-27 1987-07-21 Motorola, Inc. BICMOS driver with output voltage swing enhancement
US4910425A (en) * 1987-10-05 1990-03-20 Mitsubishi Denki Kabushiki Kaisha Input buffer circuit
US5030852A (en) * 1989-05-08 1991-07-09 Mitsubishi Denki Kabushiki Kaisha Quasicomplementary MESFET logic circuit with increased noise imunity

Also Published As

Publication number Publication date
EP0433062A2 (de) 1991-06-19
EP0433062B1 (de) 1996-06-19
EP0433062A3 (en) 1991-10-02
JPH03224316A (ja) 1991-10-03
DE69027516D1 (de) 1996-07-25
HK61797A (en) 1997-05-16
US5148060A (en) 1992-09-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee