DE69021997D1 - Neuronales netz mit differentialen kapzitiv gekoppelten eingangs- und ausgangslinien. - Google Patents

Neuronales netz mit differentialen kapzitiv gekoppelten eingangs- und ausgangslinien.

Info

Publication number
DE69021997D1
DE69021997D1 DE69021997T DE69021997T DE69021997D1 DE 69021997 D1 DE69021997 D1 DE 69021997D1 DE 69021997 T DE69021997 T DE 69021997T DE 69021997 T DE69021997 T DE 69021997T DE 69021997 D1 DE69021997 D1 DE 69021997D1
Authority
DE
Germany
Prior art keywords
capacitally
differential
output lines
neuronal network
coupled input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69021997T
Other languages
English (en)
Other versions
DE69021997T2 (de
Inventor
William Engeler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US07/366,839 external-priority patent/US5146542A/en
Application filed by General Electric Co filed Critical General Electric Co
Publication of DE69021997D1 publication Critical patent/DE69021997D1/de
Application granted granted Critical
Publication of DE69021997T2 publication Critical patent/DE69021997T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Health & Medical Sciences (AREA)
  • Computational Linguistics (AREA)
  • Molecular Biology (AREA)
  • Evolutionary Computation (AREA)
  • Data Mining & Analysis (AREA)
  • Artificial Intelligence (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Neurology (AREA)
  • Computer Hardware Design (AREA)
  • Image Analysis (AREA)
  • Networks Using Active Elements (AREA)
  • Amplifiers (AREA)
DE69021997T 1989-06-15 1990-06-14 Neuronales netz mit differentialen kapzitiv gekoppelten eingangs- und ausgangslinien. Expired - Fee Related DE69021997T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US36683889A 1989-06-15 1989-06-15
US07/366,839 US5146542A (en) 1989-06-15 1989-06-15 Neural net using capacitive structures connecting output lines and differentially driven input line pairs
PCT/US1990/003436 WO1990016039A1 (en) 1989-06-15 1990-06-14 Neural net using differential capacitively coupled input and output lines

Publications (2)

Publication Number Publication Date
DE69021997D1 true DE69021997D1 (de) 1995-10-05
DE69021997T2 DE69021997T2 (de) 1996-03-28

Family

ID=27003536

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69021997T Expired - Fee Related DE69021997T2 (de) 1989-06-15 1990-06-14 Neuronales netz mit differentialen kapzitiv gekoppelten eingangs- und ausgangslinien.

Country Status (5)

Country Link
EP (1) EP0428716B1 (de)
JP (1) JPH04500424A (de)
KR (1) KR920701918A (de)
DE (1) DE69021997T2 (de)
WO (1) WO1990016039A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940004430B1 (ko) * 1991-11-01 1994-05-25 한국전기통신공사 Mosfet 저항성 제어형 곱셈연산기
JPH09259206A (ja) * 1996-03-19 1997-10-03 Yozan:Kk 離散コサイン変換回路
KR102178183B1 (ko) * 2018-10-24 2020-11-12 포항공과대학교 산학협력단 크로스-포인트 커패시터 기반의 가중치 소자 및 이를 이용한 뉴럴 네트워크
US20230177107A1 (en) * 2020-04-29 2023-06-08 Semron Gmbh Arrangement and method for performing a vector-matrix multiplication by means of capacitive or resistive synaptic components

Also Published As

Publication number Publication date
KR920701918A (ko) 1992-08-12
EP0428716A1 (de) 1991-05-29
WO1990016039A1 (en) 1990-12-27
JPH04500424A (ja) 1992-01-23
EP0428716B1 (de) 1995-08-30
DE69021997T2 (de) 1996-03-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee