DE3883192D1 - Neuronale netzwerkschaltung und -struktur. - Google Patents

Neuronale netzwerkschaltung und -struktur.

Info

Publication number
DE3883192D1
DE3883192D1 DE8888202951T DE3883192T DE3883192D1 DE 3883192 D1 DE3883192 D1 DE 3883192D1 DE 8888202951 T DE8888202951 T DE 8888202951T DE 3883192 T DE3883192 T DE 3883192T DE 3883192 D1 DE3883192 D1 DE 3883192D1
Authority
DE
Germany
Prior art keywords
network circuit
neuronal network
neuronal
circuit
network
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888202951T
Other languages
English (en)
Other versions
DE3883192T2 (de
Inventor
Marc Duranton
Jean Gobert
Jacques-Ariel Sirat
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3883192D1 publication Critical patent/DE3883192D1/de
Publication of DE3883192T2 publication Critical patent/DE3883192T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06NCOMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00Computing arrangements based on biological models
    • G06N3/02Neural networks
    • G06N3/06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • General Engineering & Computer Science (AREA)
  • Data Mining & Analysis (AREA)
  • Artificial Intelligence (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • Computational Linguistics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Neurology (AREA)
  • Complex Calculations (AREA)
  • Image Analysis (AREA)
DE88202951T 1987-12-23 1988-12-19 Neuronale Netzwerkschaltung und -struktur. Expired - Fee Related DE3883192T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8718044A FR2625347B1 (fr) 1987-12-23 1987-12-23 Structure de reseau de neurones et circuit et arrangement de reseaux de neurones

Publications (2)

Publication Number Publication Date
DE3883192D1 true DE3883192D1 (de) 1993-09-16
DE3883192T2 DE3883192T2 (de) 1994-03-03

Family

ID=9358235

Family Applications (1)

Application Number Title Priority Date Filing Date
DE88202951T Expired - Fee Related DE3883192T2 (de) 1987-12-23 1988-12-19 Neuronale Netzwerkschaltung und -struktur.

Country Status (5)

Country Link
US (1) US4994982A (de)
EP (1) EP0322966B1 (de)
JP (1) JP2662000B2 (de)
DE (1) DE3883192T2 (de)
FR (1) FR2625347B1 (de)

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FR2639736B1 (fr) * 1988-11-25 1991-03-15 Labo Electronique Physique Procede de retropropagation du gradient et structure de reseau de neurones
FR2648251B1 (fr) * 1989-06-09 1991-09-13 Labo Electronique Physique Methode d'apprentissage et structure de reseau de neurones
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US5644681A (en) * 1989-12-18 1997-07-01 Mitsubishi Denki Kabushiki Kaisha Learning method for neural network having discrete interconnection strengths
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US5048097A (en) * 1990-02-02 1991-09-10 Eastman Kodak Company Optical character recognition neural network system for machine-printed characters
US5483620A (en) * 1990-05-22 1996-01-09 International Business Machines Corp. Learning machine synapse processor system apparatus
US5251287A (en) * 1990-05-22 1993-10-05 International Business Machines Corporation Apparatus and method for neural processing
US5337395A (en) * 1991-04-08 1994-08-09 International Business Machines Corporation SPIN: a sequential pipeline neurocomputer
EP0484506A1 (de) * 1990-05-22 1992-05-13 International Business Machines Corporation Lernmaschine mit synaptischem prozessorsystem
US5065339A (en) * 1990-05-22 1991-11-12 International Business Machines Corporation Orthogonal row-column neural processor
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DE69029390T2 (de) * 1990-09-15 1997-06-12 Ibm Programmierbare Schaltung für eine neurale Logik
JP2760145B2 (ja) * 1990-09-26 1998-05-28 三菱電機株式会社 知識情報処理装置
US5216751A (en) * 1990-10-22 1993-06-01 Motorola, Inc. Digital processing element in an artificial neural network
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US5402519A (en) * 1990-11-26 1995-03-28 Hitachi, Ltd. Neural network system adapted for non-linear processing
US5204872A (en) * 1991-04-15 1993-04-20 Milltech-Hoh, Inc. Control system for electric arc furnace
US5920851A (en) * 1991-08-13 1999-07-06 The Research Foundation Of State University Of Ny Method for generating a representation of an environment
FR2685109A1 (fr) * 1991-12-11 1993-06-18 Philips Electronique Lab Processeur numerique neuronal operant avec une approximation d'une fonction d'activation non lineaire.
US5248899A (en) * 1992-02-07 1993-09-28 Dan Haronian Neural network using photoelectric substance
FR2687814A1 (fr) * 1992-02-26 1993-08-27 Philips Electronique Lab Processeur neuronal a cellules synaptiques reparties.
EP0566015A3 (en) * 1992-04-14 1994-07-06 Eastman Kodak Co Neural network optical character recognition system and method for classifying characters in amoving web
FR2690771A1 (fr) * 1992-04-29 1993-11-05 Philips Electronique Lab Processeur neuronal muni de moyens pour normaliser des données.
FR2690772A1 (fr) * 1992-04-29 1993-11-05 Philips Electronique Lab Processeur neuronal muni de moyens pour calculer une norme ou une distance.
US5872988A (en) * 1992-06-17 1999-02-16 U.S. Philips Corporation Parallel data processing device having a concatenated data path between elementary processors
JPH0652132A (ja) * 1992-07-28 1994-02-25 Mitsubishi Electric Corp 並列演算半導体集積回路装置およびそれを用いたシステム
DE4227707A1 (de) * 1992-08-21 1993-03-18 Axel Dipl Ing Zimmermann Mikroelektronische schaltung zum aufbau selbstorganisierender karten aus digitalen neuronen
US5479579A (en) * 1992-09-04 1995-12-26 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Cascaded VLSI neural network architecture for on-line learning
US5355436A (en) * 1992-10-05 1994-10-11 The Research Foundation, State University Of New York At Buffalo Single layer neural network circuit for performing linearly separable and non-linearly separable logical operations
JPH06203005A (ja) * 1992-10-27 1994-07-22 Eastman Kodak Co 高速区分化ニューラルネットワーク及びその構築方法
TW230246B (de) * 1993-03-03 1994-09-11 Philips Electronics Nv
US5479574A (en) * 1993-04-01 1995-12-26 Nestor, Inc. Method and apparatus for adaptive classification
EP0636991A3 (de) * 1993-07-29 1997-01-08 Matsushita Electric Ind Co Ltd Informationsverarbeitungsgerät zur Durchführung eines neuronalen Netzwerkes.
US5473730A (en) * 1993-11-09 1995-12-05 At&T Ipm Corp. High efficiency learning network
US5542054A (en) * 1993-12-22 1996-07-30 Batten, Jr.; George W. Artificial neurons using delta-sigma modulation
JP2615422B2 (ja) * 1994-03-23 1997-05-28 工業技術院長 時系列学習神経回路素子およびそれを用いた時系列学習神経回路
TW284866B (de) * 1994-07-08 1996-09-01 Philips Electronics Nv
US6424961B1 (en) 1999-12-06 2002-07-23 AYALA FRANCISCO JOSé Adaptive neural learning system
US6578020B1 (en) * 1999-12-07 2003-06-10 International Business Machines Corporation Method and system for converting code to executable code using neural networks implemented in a very large scale integration (VLSI) integrated circuit
US7483868B2 (en) * 2002-04-19 2009-01-27 Computer Associates Think, Inc. Automatic neural-net model generation and maintenance
US7777743B2 (en) * 2002-04-19 2010-08-17 Computer Associates Think, Inc. Viewing multi-dimensional data through hierarchical visualization
US7444310B2 (en) * 2002-04-19 2008-10-28 Computer Associates Think, Inc. Automatic model maintenance through local nets
JP2005523533A (ja) 2002-04-19 2005-08-04 コンピュータ アソシエイツ シンク,インコーポレイテッド 混合型数字及び/又は非数字データの処理
EP1584004A4 (de) * 2003-01-17 2007-10-24 Francisco J Ayala System und verfahren zum entwickeln künstlicher intelligenz
US7493295B2 (en) * 2003-01-17 2009-02-17 Francisco J. Ayala Method, system and computer program for developing cortical algorithms
US7313279B2 (en) * 2003-07-08 2007-12-25 Computer Associates Think, Inc. Hierarchical determination of feature relevancy
WO2004107264A2 (en) * 2003-05-23 2004-12-09 Computer Associates Think, Inc. Adaptive learning enhancement to auotmated model maintenance
US9239984B2 (en) 2012-12-21 2016-01-19 International Business Machines Corporation Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a neural network
US9373073B2 (en) 2012-12-21 2016-06-21 International Business Machines Corporation Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a universal substrate of adaptation
CN109478253B (zh) * 2016-05-19 2022-11-01 国立大学法人东京工业大学 神经网络电路以及神经网络集成电路
US11615297B2 (en) 2017-04-04 2023-03-28 Hailo Technologies Ltd. Structured weight based sparsity in an artificial neural network compiler
US11238334B2 (en) 2017-04-04 2022-02-01 Hailo Technologies Ltd. System and method of input alignment for efficient vector operations in an artificial neural network
US11544545B2 (en) 2017-04-04 2023-01-03 Hailo Technologies Ltd. Structured activation based sparsity in an artificial neural network
US10387298B2 (en) 2017-04-04 2019-08-20 Hailo Technologies Ltd Artificial neural network incorporating emphasis and focus techniques
US11551028B2 (en) * 2017-04-04 2023-01-10 Hailo Technologies Ltd. Structured weight based sparsity in an artificial neural network
US10872290B2 (en) 2017-09-21 2020-12-22 Raytheon Company Neural network processor with direct memory access and hardware acceleration circuits
US11468332B2 (en) 2017-11-13 2022-10-11 Raytheon Company Deep neural network processor with interleaved backpropagation
US20190279083A1 (en) * 2018-03-06 2019-09-12 DinoplusAI Holdings Limited Computing Device for Fast Weighted Sum Calculation in Neural Networks
US10621489B2 (en) * 2018-03-30 2020-04-14 International Business Machines Corporation Massively parallel neural inference computing elements
US11507349B2 (en) * 2019-06-26 2022-11-22 Microsoft Technology Licensing, Llc Neural processing element with single instruction multiple data (SIMD) compute lanes
US11263077B1 (en) * 2020-09-29 2022-03-01 Hailo Technologies Ltd. Neural network intermediate results safety mechanism in an artificial neural network processor
US11811421B2 (en) 2020-09-29 2023-11-07 Hailo Technologies Ltd. Weights safety mechanism in an artificial neural network processor
US11874900B2 (en) 2020-09-29 2024-01-16 Hailo Technologies Ltd. Cluster interlayer safety mechanism in an artificial neural network processor
US11237894B1 (en) 2020-09-29 2022-02-01 Hailo Technologies Ltd. Layer control unit instruction addressing safety mechanism in an artificial neural network processor
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Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4193115A (en) * 1977-12-15 1980-03-11 The United States Of America As Represented By The Secretary Of Commerce Method and apparatus for implementation of the CMAC mapping algorithm
US4561065A (en) * 1982-02-23 1985-12-24 Tokyo Shibaura Denki Kabushiki Kaisha Arithmetic processing device using sampled input data and several previous output data
US4773024A (en) * 1986-06-03 1988-09-20 Synaptics, Inc. Brain emulation circuit with reduced confusion

Also Published As

Publication number Publication date
DE3883192T2 (de) 1994-03-03
JPH01201764A (ja) 1989-08-14
FR2625347B1 (fr) 1990-05-04
US4994982A (en) 1991-02-19
EP0322966A1 (de) 1989-07-05
EP0322966B1 (de) 1993-08-11
FR2625347A1 (fr) 1989-06-30
JP2662000B2 (ja) 1997-10-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8327 Change in the person/name/address of the patent owner

Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N

8339 Ceased/non-payment of the annual fee