DE69000133T2 - Mos als sicherung bei programmierbarer durchbrennung eines tunneloxydes. - Google Patents

Mos als sicherung bei programmierbarer durchbrennung eines tunneloxydes.

Info

Publication number
DE69000133T2
DE69000133T2 DE9090403479T DE69000133T DE69000133T2 DE 69000133 T2 DE69000133 T2 DE 69000133T2 DE 9090403479 T DE9090403479 T DE 9090403479T DE 69000133 T DE69000133 T DE 69000133T DE 69000133 T2 DE69000133 T2 DE 69000133T2
Authority
DE
Germany
Prior art keywords
mos
fuse
blowing
programmable
tunnel oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE9090403479T
Other languages
English (en)
Other versions
DE69000133D1 (de
Inventor
Laurent Sourgen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Publication of DE69000133D1 publication Critical patent/DE69000133D1/de
Application granted granted Critical
Publication of DE69000133T2 publication Critical patent/DE69000133T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/10—Modifications for increasing the maximum permissible switched voltage
    • H03K17/102—Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE9090403479T 1989-12-07 1990-12-06 Mos als sicherung bei programmierbarer durchbrennung eines tunneloxydes. Expired - Fee Related DE69000133T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8916196A FR2655762B1 (fr) 1989-12-07 1989-12-07 Fusible mos a claquage d'oxyde tunnel programmable.

Publications (2)

Publication Number Publication Date
DE69000133D1 DE69000133D1 (de) 1992-07-16
DE69000133T2 true DE69000133T2 (de) 1993-01-07

Family

ID=9388261

Family Applications (1)

Application Number Title Priority Date Filing Date
DE9090403479T Expired - Fee Related DE69000133T2 (de) 1989-12-07 1990-12-06 Mos als sicherung bei programmierbarer durchbrennung eines tunneloxydes.

Country Status (4)

Country Link
US (1) US5258947A (de)
EP (1) EP0432049B1 (de)
DE (1) DE69000133T2 (de)
FR (1) FR2655762B1 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2672434A1 (fr) * 1991-01-31 1992-08-07 Gemplus Card Int Fusible mos a claquage d'oxyde.
FR2690748A1 (fr) * 1992-04-30 1993-11-05 Sgs Thomson Microelectronics Circuit de détection de seuil de tension à très faible consommation.
FR2698222B1 (fr) * 1992-11-18 1994-12-16 Gemplus Card Int Procédé et circuit de claquage de fusible dans un circuit intégré.
JP3581459B2 (ja) * 1995-10-24 2004-10-27 株式会社ルネサステクノロジ 半導体記憶装置
JPH09139085A (ja) * 1995-11-16 1997-05-27 Mitsubishi Electric Corp 半導体電位供給装置およびこれを用いた半導体記憶装置
GB2318228B (en) * 1996-10-09 2000-08-09 Ericsson Telefon Ab L M Trimming circuit
US6100746A (en) * 1998-05-18 2000-08-08 Vanguard International Semiconductor Corporation Electrically programmable fuse
US6229733B1 (en) 1999-03-24 2001-05-08 Texas Instruments Incorporated Non-volatile memory cell for linear mos integrated circuits utilizing fused mosfet gate oxide
US7072814B1 (en) 1999-09-13 2006-07-04 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Evolutionary technique for automated synthesis of electronic circuits
US6728666B1 (en) 1999-09-13 2004-04-27 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Evolvable circuit with transistor-level reconfigurability
FR2811164B1 (fr) 2000-06-30 2003-08-29 St Microelectronics Sa Circuit integre avec dispositif de protection
KR100356774B1 (ko) * 2000-11-22 2002-10-18 삼성전자 주식회사 반도체 메모리 장치의 결함 어드레스 저장 회로
US6549063B1 (en) * 2002-01-11 2003-04-15 Infineon Technologies Ag Evaluation circuit for an anti-fuse
JP4981661B2 (ja) * 2004-05-06 2012-07-25 サイデンス コーポレーション 分割チャネルアンチヒューズアレイ構造
US8735297B2 (en) 2004-05-06 2014-05-27 Sidense Corporation Reverse optical proximity correction method
US7755162B2 (en) 2004-05-06 2010-07-13 Sidense Corp. Anti-fuse memory cell
US9123572B2 (en) 2004-05-06 2015-09-01 Sidense Corporation Anti-fuse memory cell
JP4383987B2 (ja) * 2004-08-18 2009-12-16 株式会社東芝 Ｍｏｓ型電気ヒューズとそのプログラム方法
US7110313B2 (en) * 2005-01-04 2006-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Multiple-time electrical fuse programming circuit
JP2007004887A (ja) * 2005-06-23 2007-01-11 Toshiba Corp 半導体記憶装置
KR20130063255A (ko) * 2011-12-06 2013-06-14 에스케이하이닉스 주식회사 반도체 메모리 장치 및 이의 동작 방법
CN103062030B (zh) * 2013-01-17 2016-01-20 中国南方电网有限责任公司超高压输电公司 一种高压直流阀冷系统主泵切换装置、方法及主泵系统
US11112455B2 (en) * 2019-02-26 2021-09-07 Texas Instruments Incorporated Built-in self-test circuits and related methods

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3576549A (en) * 1969-04-14 1971-04-27 Cogar Corp Semiconductor device, method, and memory array
US3668655A (en) * 1970-03-26 1972-06-06 Cogar Corp Write once/read only semiconductor memory array
US4488060A (en) * 1979-01-24 1984-12-11 Xicor, Inc. High voltage ramp rate control systems
US4507757A (en) * 1982-03-23 1985-03-26 Texas Instruments Incorporated Avalanche fuse element in programmable memory
JPS60121599A (ja) * 1983-12-06 1985-06-29 Fujitsu Ltd 集積回路装置
FR2621409A1 (fr) * 1987-10-02 1989-04-07 Thomson Semiconducteurs Dispositif de protection des zones memoires d'un systeme electronique a microprocesseur
US4935645A (en) * 1988-03-02 1990-06-19 Dallas Semiconductor Corporation Fusing and detection circuit
US4888738A (en) * 1988-06-29 1989-12-19 Seeq Technology Current-regulated, voltage-regulated erase circuit for EEPROM memory
FR2638869B1 (fr) * 1988-11-10 1990-12-21 Sgs Thomson Microelectronics Dispositif de securite contre la detection non autorisee de donnees protegees

Also Published As

Publication number Publication date
DE69000133D1 (de) 1992-07-16
FR2655762A1 (fr) 1991-06-14
FR2655762B1 (fr) 1992-01-17
EP0432049B1 (de) 1992-06-10
EP0432049A1 (de) 1991-06-12
US5258947A (en) 1993-11-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee