DE68924369D1 - Mikroprozessorsystem. - Google Patents
Mikroprozessorsystem.Info
- Publication number
- DE68924369D1 DE68924369D1 DE68924369T DE68924369T DE68924369D1 DE 68924369 D1 DE68924369 D1 DE 68924369D1 DE 68924369 T DE68924369 T DE 68924369T DE 68924369 T DE68924369 T DE 68924369T DE 68924369 D1 DE68924369 D1 DE 68924369D1
- Authority
- DE
- Germany
- Prior art keywords
- microprocessor system
- microprocessor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4009—Coupling between buses with data restructuring
- G06F13/4018—Coupling between buses with data restructuring with data-width conversion
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63131235A JPH01300361A (ja) | 1988-05-28 | 1988-05-28 | マイクロプロセッサシステム |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68924369D1 true DE68924369D1 (de) | 1995-11-02 |
DE68924369T2 DE68924369T2 (de) | 1996-04-04 |
Family
ID=15053169
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68924369T Expired - Fee Related DE68924369T2 (de) | 1988-05-28 | 1989-05-29 | Mikroprozessorsystem. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5121485A (de) |
EP (1) | EP0344677B1 (de) |
JP (1) | JPH01300361A (de) |
DE (1) | DE68924369T2 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5223750A (en) * | 1990-06-04 | 1993-06-29 | Matsushita Research Institute Tokyo, Inc. | Artificial neural function circuit having organic thin film elements |
GB9019022D0 (en) * | 1990-08-31 | 1990-10-17 | Ncr Co | Work station or similar data processing system including interfacing means to microchannel means |
US5377328A (en) * | 1991-06-05 | 1994-12-27 | Data General Corporation | Technique for providing improved signal integrity on computer systems interface buses |
US5333276A (en) * | 1991-12-27 | 1994-07-26 | Intel Corporation | Method and apparatus for priority selection of commands |
JP2790034B2 (ja) * | 1994-03-28 | 1998-08-27 | 日本電気株式会社 | 非運用系メモリ更新方式 |
US6625711B1 (en) * | 2000-11-16 | 2003-09-23 | Cypress Semiconductor Corp. | Method and/or architecture for implementing queue expansion in multiqueue devices |
CN107992439B (zh) * | 2017-10-13 | 2020-12-18 | 武汉高德智感科技有限公司 | 一种可扩展的数据交互方法及系统 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2021823B (en) * | 1978-05-30 | 1983-04-27 | Intel Corp | Data transfer system |
IT1121031B (it) * | 1979-09-19 | 1986-03-26 | Olivetti & Co Spa | Sistema di elaborazione di dati multiprocessore |
JPS56145415A (en) * | 1980-04-10 | 1981-11-12 | Matsushita Electric Works Ltd | Direct memory access device |
US4511969A (en) * | 1983-05-20 | 1985-04-16 | At&T Information Systems Inc. | Control channel interface circuit |
JPS60138664A (ja) * | 1983-12-27 | 1985-07-23 | Hitachi Ltd | 所要デ−タバス幅の異なる装置群のためのデ−タバス方式 |
US4901224A (en) * | 1985-02-25 | 1990-02-13 | Ewert Alfred P | Parallel digital processor |
US4837677A (en) * | 1985-06-14 | 1989-06-06 | International Business Machines Corporation | Multiple port service expansion adapter for a communications controller |
US4896256A (en) * | 1986-05-14 | 1990-01-23 | Kabushiki Kaisha Toshiba | Linking interface system using plural controllable bidirectional bus ports for intercommunication amoung split-bus intracommunication subsystems |
US4912636A (en) * | 1987-03-13 | 1990-03-27 | Magar Surendar S | Data processing device with multiple on chip memory buses |
US4833599A (en) * | 1987-04-20 | 1989-05-23 | Multiflow Computer, Inc. | Hierarchical priority branch handling for parallel execution in a parallel processor |
-
1988
- 1988-05-28 JP JP63131235A patent/JPH01300361A/ja active Pending
-
1989
- 1989-05-29 EP EP89109638A patent/EP0344677B1/de not_active Expired - Lifetime
- 1989-05-29 DE DE68924369T patent/DE68924369T2/de not_active Expired - Fee Related
- 1989-05-30 US US07/358,111 patent/US5121485A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0344677A2 (de) | 1989-12-06 |
US5121485A (en) | 1992-06-09 |
EP0344677B1 (de) | 1995-09-27 |
DE68924369T2 (de) | 1996-04-04 |
EP0344677A3 (en) | 1990-10-17 |
JPH01300361A (ja) | 1989-12-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |