DE68914172D1 - Datenverarbeitungssystem und Videoverarbeitungssystem mit einem derartigen Datenverarbeitungssystem. - Google Patents
Datenverarbeitungssystem und Videoverarbeitungssystem mit einem derartigen Datenverarbeitungssystem.Info
- Publication number
- DE68914172D1 DE68914172D1 DE89200037T DE68914172T DE68914172D1 DE 68914172 D1 DE68914172 D1 DE 68914172D1 DE 89200037 T DE89200037 T DE 89200037T DE 68914172 T DE68914172 T DE 68914172T DE 68914172 D1 DE68914172 D1 DE 68914172D1
- Authority
- DE
- Germany
- Prior art keywords
- processing system
- data processing
- video
- data
- video processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
- G06F9/262—Arrangements for next microinstruction selection
- G06F9/264—Microinstruction selection based on results of processing
- G06F9/267—Microinstruction selection based on results of processing by instruction selection on output of storage
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Multi Processors (AREA)
- Complex Calculations (AREA)
- Image Processing (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8800071A NL8800071A (nl) | 1988-01-13 | 1988-01-13 | Dataprocessorsysteem en videoprocessorsysteem, voorzien van een dergelijk dataprocessorsysteem. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68914172D1 true DE68914172D1 (de) | 1994-05-05 |
DE68914172T2 DE68914172T2 (de) | 1994-10-06 |
Family
ID=19851586
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68914172T Expired - Fee Related DE68914172T2 (de) | 1988-01-13 | 1989-01-09 | Datenverarbeitungssystem und Videoverarbeitungssystem mit einem derartigen Datenverarbeitungssystem. |
Country Status (7)
Country | Link |
---|---|
US (1) | US5055997A (de) |
EP (1) | EP0325314B1 (de) |
JP (1) | JP2879093B2 (de) |
KR (1) | KR0147060B1 (de) |
DE (1) | DE68914172T2 (de) |
FI (1) | FI890117A (de) |
NL (1) | NL8800071A (de) |
Families Citing this family (68)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5692139A (en) * | 1988-01-11 | 1997-11-25 | North American Philips Corporation, Signetics Div. | VLIW processing device including improved memory for avoiding collisions without an excessive number of ports |
US5862399A (en) * | 1988-12-28 | 1999-01-19 | Philips Electronics North America Corporation | Write control unit |
US5522083A (en) * | 1989-11-17 | 1996-05-28 | Texas Instruments Incorporated | Reconfigurable multi-processor operating in SIMD mode with one processor fetching instructions for use by remaining processors |
US5283877A (en) * | 1990-07-17 | 1994-02-01 | Sun Microsystems, Inc. | Single in-line DRAM memory module including a memory controller and cross bar switches |
JPH07117498B2 (ja) * | 1991-12-11 | 1995-12-18 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 検査システム |
US6002880A (en) * | 1992-12-29 | 1999-12-14 | Philips Electronics North America Corporation | VLIW processor with less instruction issue slots than functional units |
EP0605927B1 (de) * | 1992-12-29 | 1999-07-28 | Koninklijke Philips Electronics N.V. | Verbesserte Architektur für Prozessor mit sehr langem Befehlswort |
US5481736A (en) * | 1993-02-17 | 1996-01-02 | Hughes Aircraft Company | Computer processing element having first and second functional units accessing shared memory output port on prioritized basis |
KR0142803B1 (ko) * | 1993-09-02 | 1998-07-15 | 모리시다 요이치 | 신호처리장치 |
US6360313B1 (en) | 1993-11-05 | 2002-03-19 | Intergraph Corporation | Instruction cache associative crossbar switch |
EP0652509B1 (de) * | 1993-11-05 | 2000-05-10 | Intergraph Corporation | Befehlscachespeicher mit Kreuzschienenschalter |
DE69422780T2 (de) * | 1993-11-05 | 2000-08-17 | Intergraph Corp., Huntsville | Superskalare Rechnerarchitektur mit Softwarescheduling |
US7266725B2 (en) | 2001-09-03 | 2007-09-04 | Pact Xpp Technologies Ag | Method for debugging reconfigurable architectures |
KR19990029027A (ko) * | 1996-05-17 | 1999-04-15 | 엠. 제이. 엠. 반캄 | 표시장치 |
DE19651075A1 (de) | 1996-12-09 | 1998-06-10 | Pact Inf Tech Gmbh | Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen |
DE19654595A1 (de) | 1996-12-20 | 1998-07-02 | Pact Inf Tech Gmbh | I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen |
JP3961028B2 (ja) | 1996-12-27 | 2007-08-15 | ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト | データフロープロセッサ(dfp)の自動的なダイナミックアンロード方法並びに2次元または3次元のプログラミング可能なセルストラクチャを有するモジュール(fpga,dpga等) |
US6542998B1 (en) | 1997-02-08 | 2003-04-01 | Pact Gmbh | Method of self-synchronization of configurable elements of a programmable module |
US6786420B1 (en) | 1997-07-15 | 2004-09-07 | Silverbrook Research Pty. Ltd. | Data distribution mechanism in the form of ink dots on cards |
US6618117B2 (en) | 1997-07-12 | 2003-09-09 | Silverbrook Research Pty Ltd | Image sensing apparatus including a microcontroller |
US7110024B1 (en) | 1997-07-15 | 2006-09-19 | Silverbrook Research Pty Ltd | Digital camera system having motion deblurring means |
US6624848B1 (en) | 1997-07-15 | 2003-09-23 | Silverbrook Research Pty Ltd | Cascading image modification using multiple digital cameras incorporating image processing |
US20040119829A1 (en) | 1997-07-15 | 2004-06-24 | Silverbrook Research Pty Ltd | Printhead assembly for a print on demand digital camera system |
US6879341B1 (en) | 1997-07-15 | 2005-04-12 | Silverbrook Research Pty Ltd | Digital camera system containing a VLIW vector processor |
US6690419B1 (en) | 1997-07-15 | 2004-02-10 | Silverbrook Research Pty Ltd | Utilising eye detection methods for image processing in a digital image camera |
US9092595B2 (en) | 1997-10-08 | 2015-07-28 | Pact Xpp Technologies Ag | Multiprocessor having associated RAM units |
US8686549B2 (en) | 2001-09-03 | 2014-04-01 | Martin Vorbach | Reconfigurable elements |
EP0950225B1 (de) * | 1997-10-21 | 2006-01-04 | Koninklijke Philips Electronics N.V. | Signalverarbeitungsvorrichtung und verfahren zur verbindungsplanung zwischen prozessoren in einer signalverarbeitungsvorrichtung |
DE19861088A1 (de) | 1997-12-22 | 2000-02-10 | Pact Inf Tech Gmbh | Verfahren zur Reparatur von integrierten Schaltkreisen |
AUPP702098A0 (en) | 1998-11-09 | 1998-12-03 | Silverbrook Research Pty Ltd | Image creation method and apparatus (ART73) |
US6282592B1 (en) * | 1998-12-14 | 2001-08-28 | Nortel Networks Limited | Method and apparatus for high-speed data transmission bus entrainment |
WO2002013000A2 (de) | 2000-06-13 | 2002-02-14 | Pact Informationstechnologie Gmbh | Pipeline ct-protokolle und -kommunikation |
AUPQ056099A0 (en) | 1999-05-25 | 1999-06-17 | Silverbrook Research Pty Ltd | A method and apparatus (pprint01) |
WO2000077652A2 (de) | 1999-06-10 | 2000-12-21 | Pact Informationstechnologie Gmbh | Sequenz-partitionierung auf zellstrukturen |
US8058899B2 (en) | 2000-10-06 | 2011-11-15 | Martin Vorbach | Logic cell array and bus system |
US9250908B2 (en) | 2001-03-05 | 2016-02-02 | Pact Xpp Technologies Ag | Multi-processor bus and cache interconnection system |
US9141390B2 (en) | 2001-03-05 | 2015-09-22 | Pact Xpp Technologies Ag | Method of processing data with an array of data processors according to application ID |
US9037807B2 (en) | 2001-03-05 | 2015-05-19 | Pact Xpp Technologies Ag | Processor arrangement on a chip including data processing, memory, and interface elements |
US7444531B2 (en) | 2001-03-05 | 2008-10-28 | Pact Xpp Technologies Ag | Methods and devices for treating and processing data |
US9552047B2 (en) | 2001-03-05 | 2017-01-24 | Pact Xpp Technologies Ag | Multiprocessor having runtime adjustable clock and clock dependent power supply |
US7844796B2 (en) | 2001-03-05 | 2010-11-30 | Martin Vorbach | Data processing device and method |
US9436631B2 (en) | 2001-03-05 | 2016-09-06 | Pact Xpp Technologies Ag | Chip including memory element storing higher level memory data on a page by page basis |
US10031733B2 (en) | 2001-06-20 | 2018-07-24 | Scientia Sol Mentis Ag | Method for processing data |
US6836815B1 (en) * | 2001-07-11 | 2004-12-28 | Pasternak Solutions Llc | Layered crossbar for interconnection of multiple processors and shared memories |
US7996827B2 (en) | 2001-08-16 | 2011-08-09 | Martin Vorbach | Method for the translation of programs for reconfigurable architectures |
US7434191B2 (en) | 2001-09-03 | 2008-10-07 | Pact Xpp Technologies Ag | Router |
US8686475B2 (en) * | 2001-09-19 | 2014-04-01 | Pact Xpp Technologies Ag | Reconfigurable elements |
EP1483682A2 (de) | 2002-01-19 | 2004-12-08 | PACT XPP Technologies AG | Reconfigurierbarer prozessor |
DE10390689D2 (de) | 2002-02-18 | 2005-02-10 | Pact Xpp Technologies Ag | Bussysteme und Rekonfigurationsverfahren |
US8914590B2 (en) | 2002-08-07 | 2014-12-16 | Pact Xpp Technologies Ag | Data processing method and device |
US9170812B2 (en) | 2002-03-21 | 2015-10-27 | Pact Xpp Technologies Ag | Data processing system having integrated pipelined array data processor |
AU2003286131A1 (en) | 2002-08-07 | 2004-03-19 | Pact Xpp Technologies Ag | Method and device for processing data |
US7657861B2 (en) | 2002-08-07 | 2010-02-02 | Pact Xpp Technologies Ag | Method and device for processing data |
JP4388895B2 (ja) | 2002-09-06 | 2009-12-24 | ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト | リコンフィギュアラブルなシーケンサ構造 |
US8001266B1 (en) | 2003-03-31 | 2011-08-16 | Stretch, Inc. | Configuring a multi-processor system |
US7581081B2 (en) | 2003-03-31 | 2009-08-25 | Stretch, Inc. | Systems and methods for software extensible multi-processing |
US7613900B2 (en) * | 2003-03-31 | 2009-11-03 | Stretch, Inc. | Systems and methods for selecting input/output configuration in an integrated circuit |
US7590829B2 (en) * | 2003-03-31 | 2009-09-15 | Stretch, Inc. | Extension adapter |
US7418575B2 (en) * | 2003-07-29 | 2008-08-26 | Stretch, Inc. | Long instruction word processing with instruction extensions |
US7373642B2 (en) | 2003-07-29 | 2008-05-13 | Stretch, Inc. | Defining instruction extensions in a standard programming language |
JP4700611B2 (ja) | 2003-08-28 | 2011-06-15 | ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト | データ処理装置およびデータ処理方法 |
US7237055B1 (en) * | 2003-10-22 | 2007-06-26 | Stretch, Inc. | System, apparatus and method for data path routing configurable to perform dynamic bit permutations |
US7526632B1 (en) | 2003-10-22 | 2009-04-28 | Stretch, Inc. | System, apparatus and method for implementing multifunctional memory in reconfigurable data path processing |
FR2888349A1 (fr) * | 2005-07-06 | 2007-01-12 | St Microelectronics Sa | Adaptation de debit binaire dans un flot de traitement de donnees |
WO2007082730A1 (de) | 2006-01-18 | 2007-07-26 | Pact Xpp Technologies Ag | Hardwaredefinitionsverfahren |
US20100281235A1 (en) * | 2007-11-17 | 2010-11-04 | Martin Vorbach | Reconfigurable floating-point and bit-level data processing unit |
US20110173596A1 (en) * | 2007-11-28 | 2011-07-14 | Martin Vorbach | Method for facilitating compilation of high-level code for varying architectures |
EP2235627A1 (de) * | 2007-12-07 | 2010-10-06 | Krass, Maren | Verwendung von funktionsaufrufen als compiler-direktiven |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3718912A (en) * | 1970-12-22 | 1973-02-27 | Ibm | Instruction execution unit |
BE794862A (fr) * | 1972-02-01 | 1973-08-01 | Siemens Ag | Dispositif de commande a microprogrammes |
US3970993A (en) * | 1974-01-02 | 1976-07-20 | Hughes Aircraft Company | Cooperative-word linear array parallel processor |
JPS5245232A (en) * | 1975-10-08 | 1977-04-09 | Hitachi Ltd | Micro program modification circuit |
DE2555963C2 (de) * | 1975-12-12 | 1982-10-28 | Ibm Deutschland Gmbh, 7000 Stuttgart | Einrichtung zur Funktionsmodifizierung |
JPS52120640A (en) * | 1976-04-02 | 1977-10-11 | Toshiba Corp | Micro program control system |
US4236204A (en) * | 1978-03-13 | 1980-11-25 | Motorola, Inc. | Instruction set modifier register |
US4293907A (en) * | 1978-12-29 | 1981-10-06 | Bell Telephone Laboratories, Incorporated | Data processing apparatus having op-code extension register |
US4467409A (en) * | 1980-08-05 | 1984-08-21 | Burroughs Corporation | Flexible computer architecture using arrays of standardized microprocessors customized for pipeline and parallel operations |
DE3533800C1 (de) * | 1985-09-21 | 1987-02-05 | Hans-Werner Lang | Verfahren zum Betreiben eines hochintegrierten Wellenfront-Feldrechners sowie entsprechender Wellenfront-Feldrechner |
US4807183A (en) * | 1985-09-27 | 1989-02-21 | Carnegie-Mellon University | Programmable interconnection chip for computer system functional modules |
US4907148A (en) * | 1985-11-13 | 1990-03-06 | Alcatel U.S.A. Corp. | Cellular array processor with individual cell-level data-dependent cell control and multiport input memory |
US4783738A (en) * | 1986-03-13 | 1988-11-08 | International Business Machines Corporation | Adaptive instruction processing by array processor having processor identification and data dependent status registers in each processing element |
JPS638971A (ja) * | 1986-06-30 | 1988-01-14 | Nec Corp | 多項式ベクトル演算実行制御装置 |
-
1988
- 1988-01-13 NL NL8800071A patent/NL8800071A/nl not_active Application Discontinuation
-
1989
- 1989-01-09 EP EP89200037A patent/EP0325314B1/de not_active Expired - Lifetime
- 1989-01-09 DE DE68914172T patent/DE68914172T2/de not_active Expired - Fee Related
- 1989-01-10 JP JP1002161A patent/JP2879093B2/ja not_active Expired - Lifetime
- 1989-01-10 KR KR1019890000186A patent/KR0147060B1/ko not_active IP Right Cessation
- 1989-01-10 FI FI890117A patent/FI890117A/fi not_active Application Discontinuation
-
1990
- 1990-10-09 US US07/595,720 patent/US5055997A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE68914172T2 (de) | 1994-10-06 |
FI890117A (fi) | 1989-07-14 |
FI890117A0 (fi) | 1989-01-10 |
NL8800071A (nl) | 1989-08-01 |
EP0325314B1 (de) | 1994-03-30 |
US5055997A (en) | 1991-10-08 |
JP2879093B2 (ja) | 1999-04-05 |
KR890012233A (ko) | 1989-08-25 |
KR0147060B1 (ko) | 1998-09-15 |
EP0325314A1 (de) | 1989-07-26 |
JPH01232463A (ja) | 1989-09-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N |
|
8339 | Ceased/non-payment of the annual fee |