DE60207286D1 - Datenverarbeitungsgerät - Google Patents
DatenverarbeitungsgerätInfo
- Publication number
- DE60207286D1 DE60207286D1 DE60207286T DE60207286T DE60207286D1 DE 60207286 D1 DE60207286 D1 DE 60207286D1 DE 60207286 T DE60207286 T DE 60207286T DE 60207286 T DE60207286 T DE 60207286T DE 60207286 D1 DE60207286 D1 DE 60207286D1
- Authority
- DE
- Germany
- Prior art keywords
- buffers
- subset
- buffer
- data
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/0623—Address space extension for memory modules
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer And Data Communications (AREA)
- Information Transfer Systems (AREA)
- Monitoring And Testing Of Nuclear Reactors (AREA)
- Vehicle Body Suspensions (AREA)
- Measuring Pulse, Heart Rate, Blood Pressure Or Blood Flow (AREA)
- Communication Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02293246A EP1434138B1 (de) | 2002-12-26 | 2002-12-26 | Datenverarbeitungsgerät |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60207286D1 true DE60207286D1 (de) | 2005-12-15 |
DE60207286T2 DE60207286T2 (de) | 2006-07-13 |
Family
ID=32405810
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60207286T Expired - Fee Related DE60207286T2 (de) | 2002-12-26 | 2002-12-26 | Datenverarbeitungsgerät |
Country Status (4)
Country | Link |
---|---|
US (1) | US7082482B2 (de) |
EP (1) | EP1434138B1 (de) |
AT (1) | ATE309577T1 (de) |
DE (1) | DE60207286T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7512721B1 (en) | 2004-05-25 | 2009-03-31 | Qlogic, Corporation | Method and apparatus for efficient determination of status from DMA lists |
US7895390B1 (en) * | 2004-05-25 | 2011-02-22 | Qlogic, Corporation | Ensuring buffer availability |
DE102019131603A1 (de) * | 2019-11-22 | 2021-05-27 | WAGO Verwaltungsgesellschaft mit beschränkter Haftung | Vorrichtung und verfahren zur gepufferten übertragung von daten |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB9019026D0 (en) * | 1990-08-31 | 1990-10-17 | Ncr Co | Work station including a direct memory access controller |
JP2002516042A (ja) | 1996-01-31 | 2002-05-28 | イプシロン ネットワークス インコーポレイテッド | 伝送ネットワークにおいてパケットの経路指定とスイッチングとの間をダイナミックにシフトする改良された方法及び装置 |
US6052387A (en) * | 1997-10-31 | 2000-04-18 | Ncr Corporation | Enhanced interface for an asynchronous transfer mode segmentation controller |
US6041328A (en) * | 1997-12-17 | 2000-03-21 | Advanced Micro Devices, Inc. | Tracking availability of elements within a shared list of elements from an index and count mechanism |
US6532503B1 (en) * | 2000-02-18 | 2003-03-11 | 3Com Corporation | Method and apparatus to detect lost buffers with a descriptor based queue |
JP3790655B2 (ja) | 2000-03-06 | 2006-06-28 | 富士通株式会社 | ラベルスイッチネットワークシステム |
US6874039B2 (en) * | 2000-09-08 | 2005-03-29 | Intel Corporation | Method and apparatus for distributed direct memory access for systems on chip |
US6704021B1 (en) * | 2000-11-20 | 2004-03-09 | Ati International Srl | Method and apparatus for efficiently processing vertex information in a video graphics system |
-
2002
- 2002-12-26 AT AT02293246T patent/ATE309577T1/de not_active IP Right Cessation
- 2002-12-26 EP EP02293246A patent/EP1434138B1/de not_active Expired - Lifetime
- 2002-12-26 DE DE60207286T patent/DE60207286T2/de not_active Expired - Fee Related
-
2003
- 2003-12-19 US US10/739,158 patent/US7082482B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1434138A1 (de) | 2004-06-30 |
ATE309577T1 (de) | 2005-11-15 |
US20040153619A1 (en) | 2004-08-05 |
US7082482B2 (en) | 2006-07-25 |
EP1434138B1 (de) | 2005-11-09 |
DE60207286T2 (de) | 2006-07-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: ALCATEL LUCENT, PARIS, FR |
|
8339 | Ceased/non-payment of the annual fee |