DE60204539D1 - Feldprogrammierbare Vorrichtung - Google Patents

Feldprogrammierbare Vorrichtung

Info

Publication number
DE60204539D1
DE60204539D1 DE60204539T DE60204539T DE60204539D1 DE 60204539 D1 DE60204539 D1 DE 60204539D1 DE 60204539 T DE60204539 T DE 60204539T DE 60204539 T DE60204539 T DE 60204539T DE 60204539 D1 DE60204539 D1 DE 60204539D1
Authority
DE
Germany
Prior art keywords
field programmable
programmable device
field
programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60204539T
Other languages
English (en)
Inventor
Deepak Agarwal
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Ltd Great Britain
Original Assignee
STMicroelectronics Ltd Great Britain
SGS Thomson Microelectronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Ltd Great Britain, SGS Thomson Microelectronics Ltd filed Critical STMicroelectronics Ltd Great Britain
Application granted granted Critical
Publication of DE60204539D1 publication Critical patent/DE60204539D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318516—Test of programmable logic devices [PLDs]
    • G01R31/318519—Test of field programmable gate arrays [FPGA]
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318516—Test of programmable logic devices [PLDs]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17764—Structural details of configuration resources for reliability

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Logic Circuits (AREA)
DE60204539T 2002-04-03 2002-04-03 Feldprogrammierbare Vorrichtung Expired - Lifetime DE60204539D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP02252426A EP1351065B1 (de) 2002-04-03 2002-04-03 Feldprogrammierbare Vorrichtung

Publications (1)

Publication Number Publication Date
DE60204539D1 true DE60204539D1 (de) 2005-07-14

Family

ID=27838154

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60204539T Expired - Lifetime DE60204539D1 (de) 2002-04-03 2002-04-03 Feldprogrammierbare Vorrichtung

Country Status (3)

Country Link
US (2) US7171599B2 (de)
EP (1) EP1351065B1 (de)
DE (1) DE60204539D1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7506210B1 (en) 2003-06-26 2009-03-17 Xilinx, Inc. Method of debugging PLD configuration using boundary scan
US8566616B1 (en) * 2004-09-10 2013-10-22 Altera Corporation Method and apparatus for protecting designs in SRAM-based programmable logic devices and the like
US8612772B1 (en) 2004-09-10 2013-12-17 Altera Corporation Security core using soft key
US7480843B1 (en) * 2004-09-29 2009-01-20 Xilinx, Inc. Configuration access from a boundary-scannable device
US7376872B1 (en) * 2004-11-01 2008-05-20 Lattice Semiconductor Corporation Testing embedded memory in integrated circuits such as programmable logic devices
US8493089B2 (en) * 2011-04-06 2013-07-23 International Business Machines Corporation Programmable logic circuit using three-dimensional stacking techniques
CN102508815B (zh) * 2011-10-20 2014-10-08 大唐移动通信设备有限公司 一种数据处理方法和系统
US9235460B2 (en) 2012-02-27 2016-01-12 Altera Corporation Methods and apparatus for automatic fault detection

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5347519A (en) * 1991-12-03 1994-09-13 Crosspoint Solutions Inc. Preprogramming testing in a field programmable gate array
US5426378A (en) * 1994-04-20 1995-06-20 Xilinx, Inc. Programmable logic device which stores more than one configuration and means for switching configurations
US6421754B1 (en) * 1994-12-22 2002-07-16 Texas Instruments Incorporated System management mode circuits, systems and methods
US5640106A (en) * 1995-05-26 1997-06-17 Xilinx, Inc. Method and structure for loading data into several IC devices
US5815510A (en) * 1996-03-28 1998-09-29 Cypress Semiconductor Corp. Serial programming of instruction codes in different numbers of clock cycles
US5768288A (en) * 1996-03-28 1998-06-16 Cypress Semiconductor Corp. Method and apparatus for programming a programmable logic device having verify logic for comparing verify data read from a memory location with program data
US5789938A (en) * 1996-09-04 1998-08-04 Xilinx, Inc. Structure and method for reading blocks of data from selectable points in a memory device
US5910732A (en) * 1997-03-12 1999-06-08 Xilinx, Inc. Programmable gate array having shared signal lines for interconnect and configuration
US6127843A (en) * 1997-12-22 2000-10-03 Vantis Corporation Dual port SRAM memory for run time use in FPGA integrated circuits
US6237124B1 (en) * 1998-03-16 2001-05-22 Actel Corporation Methods for errors checking the configuration SRAM and user assignable SRAM data in a field programmable gate array
JP2000149564A (ja) * 1998-10-30 2000-05-30 Mitsubishi Electric Corp 半導体記憶装置
US6300769B1 (en) * 1999-12-17 2001-10-09 Lsi Logic Corporation Fast comparator suitable for BIST and BISR applications
US6874110B1 (en) * 2000-05-11 2005-03-29 Stretch, Inc. Apparatus and method for self testing programmable logic arrays
US6914449B2 (en) * 2001-04-02 2005-07-05 Xilinx, Inc. Structure for reducing leakage current in submicron IC devices
EP2051381B1 (de) * 2002-04-03 2011-09-14 Sicronic Remote KG, LLC Feldprogrammierbare Vorrichtung
US7007203B2 (en) * 2002-08-02 2006-02-28 Motorola, Inc. Error checking in a reconfigurable logic signal processor (RLSP)
US7328377B1 (en) * 2004-01-27 2008-02-05 Altera Corporation Error correction for programmable logic integrated circuits
US7263631B2 (en) * 2004-08-13 2007-08-28 Seakr Engineering, Incorporated Soft error detection and recovery

Also Published As

Publication number Publication date
EP1351065B1 (de) 2005-06-08
US7171599B2 (en) 2007-01-30
US20030221151A1 (en) 2003-11-27
EP1351065A1 (de) 2003-10-08
USRE42264E1 (en) 2011-03-29

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Legal Events

Date Code Title Description
8332 No legal effect for de