DE602007012379D1 - Verfahren zur Charakterisierung eines Zeitpunkts der Biterkennung - Google Patents

Verfahren zur Charakterisierung eines Zeitpunkts der Biterkennung

Info

Publication number
DE602007012379D1
DE602007012379D1 DE602007012379T DE602007012379T DE602007012379D1 DE 602007012379 D1 DE602007012379 D1 DE 602007012379D1 DE 602007012379 T DE602007012379 T DE 602007012379T DE 602007012379 T DE602007012379 T DE 602007012379T DE 602007012379 D1 DE602007012379 D1 DE 602007012379D1
Authority
DE
Germany
Prior art keywords
characterizing
time
bit recognition
recognition
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602007012379T
Other languages
English (en)
Inventor
Herve Le-Gall
Paul Armagnat
Jean-Christophe Pont
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Publication of DE602007012379D1 publication Critical patent/DE602007012379D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31725—Timing aspects, e.g. clock distribution, skew, propagation delay
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31708—Analysis of signal quality
    • G01R31/3171—BER [Bit Error Rate] test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31727—Clock circuits aspects, e.g. test clock circuit details, timing aspects for signal generation, circuits for testing clocks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
DE602007012379T 2006-03-17 2007-03-07 Verfahren zur Charakterisierung eines Zeitpunkts der Biterkennung Active DE602007012379D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0602386 2006-03-17

Publications (1)

Publication Number Publication Date
DE602007012379D1 true DE602007012379D1 (de) 2011-03-24

Family

ID=37465065

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602007012379T Active DE602007012379D1 (de) 2006-03-17 2007-03-07 Verfahren zur Charakterisierung eines Zeitpunkts der Biterkennung

Country Status (3)

Country Link
US (1) US7941738B2 (de)
EP (1) EP1835296B1 (de)
DE (1) DE602007012379D1 (de)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5220581A (en) * 1991-03-28 1993-06-15 International Business Machines Corporation Digital data link performance monitor
US5371766A (en) * 1992-11-20 1994-12-06 International Business Machines Corporation Clock extraction and data regeneration logic for multiple speed data communications systems
US6701140B1 (en) * 2000-09-14 2004-03-02 3Com Corporation Digital receive phase lock loop with cumulative phase error correction and dynamically programmable correction rate
EP1351067B1 (de) * 2003-02-25 2004-11-10 Agilent Technologies Inc Aufspüren eines Signalübergangs

Also Published As

Publication number Publication date
EP1835296B1 (de) 2011-02-09
US20070226595A1 (en) 2007-09-27
US7941738B2 (en) 2011-05-10
EP1835296A1 (de) 2007-09-19

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