DE602005002766D1 - Verfahren und Anordnung zum Abtasten von numerischen Daten in einer synchronen Übertragung mit Bewahren der binären Integrität - Google Patents

Verfahren und Anordnung zum Abtasten von numerischen Daten in einer synchronen Übertragung mit Bewahren der binären Integrität

Info

Publication number
DE602005002766D1
DE602005002766D1 DE602005002766T DE602005002766T DE602005002766D1 DE 602005002766 D1 DE602005002766 D1 DE 602005002766D1 DE 602005002766 T DE602005002766 T DE 602005002766T DE 602005002766 T DE602005002766 T DE 602005002766T DE 602005002766 D1 DE602005002766 D1 DE 602005002766D1
Authority
DE
Germany
Prior art keywords
preserving
arrangement
numerical data
synchronous transmission
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005002766T
Other languages
English (en)
Other versions
DE602005002766T2 (de
Inventor
Pierre Courant
Christophe T Marron
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thales SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales SA filed Critical Thales SA
Publication of DE602005002766D1 publication Critical patent/DE602005002766D1/de
Application granted granted Critical
Publication of DE602005002766T2 publication Critical patent/DE602005002766T2/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H04L7/0012—Synchronisation information channels, e.g. clock distribution lines by comparing receiver clock with transmitter clock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/10—Arrangements for initial synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Time-Division Multiplex Systems (AREA)
DE602005002766T 2004-03-05 2005-03-02 Verfahren und Anordnung zum Abtasten von numerischen Daten in einer synchronen Übertragung mit Bewahren der binären Integrität Active DE602005002766T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0402351A FR2867334B1 (fr) 2004-03-05 2004-03-05 Procede et dispositif d'echantillonnage de donnees numeriques dans une transmission synchrone, avec maintien de l'integrite binaire
FR0402351 2004-03-05

Publications (2)

Publication Number Publication Date
DE602005002766D1 true DE602005002766D1 (de) 2007-11-22
DE602005002766T2 DE602005002766T2 (de) 2008-07-24

Family

ID=34746500

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005002766T Active DE602005002766T2 (de) 2004-03-05 2005-03-02 Verfahren und Anordnung zum Abtasten von numerischen Daten in einer synchronen Übertragung mit Bewahren der binären Integrität

Country Status (7)

Country Link
US (2) US7509514B2 (de)
EP (1) EP1571531B1 (de)
AT (1) ATE375540T1 (de)
DE (1) DE602005002766T2 (de)
ES (1) ES2294632T3 (de)
FR (1) FR2867334B1 (de)
PL (1) PL1571531T3 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1737146B1 (de) * 2005-06-22 2015-09-16 Saab Ab Vorrichtung und Verfahren zur Datenübertragung
EP2002271B1 (de) * 2006-03-27 2010-05-26 Freescale Semiconductor, Inc. Vorrichtung zum detektieren eines taktausfalls und verfahren dafür
WO2016119794A1 (en) * 2015-01-28 2016-08-04 Dynastrom Aps Audio time synchronization using prioritized schedule

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4972442A (en) * 1989-04-27 1990-11-20 Northern Telecom Limited Phase-locked loop clock
ATE232317T1 (de) * 1997-10-10 2003-02-15 Rambus Inc Verfahren und vorrichtung zur ausfallsicheren resynchronisation mit minimaler latenzzeit
WO1999031833A2 (en) * 1997-12-16 1999-06-24 Koninklijke Philips Electronics N.V. Synchronisation in an atm over stm transmission system
ITTO980007A1 (it) * 1998-01-07 1999-07-07 Alsthom Cge Alcatel Sistema e/o procedimento per il riconoscimento e inseguimento della fase di campionamento in sistemi di trasmissione digitale sincroni.
DE19830260A1 (de) * 1998-07-07 2000-01-13 Alcatel Sa Taktgenerator und Synchronisierungsverfahren
US6347128B1 (en) * 1998-07-20 2002-02-12 Lucent Technologies Inc. Self-aligned clock recovery circuit with proportional phase detector
US6246702B1 (en) * 1998-08-19 2001-06-12 Path 1 Network Technologies, Inc. Methods and apparatus for providing quality-of-service guarantees in computer networks
EP1075107A1 (de) * 1999-08-06 2001-02-07 STMicroelectronics S.r.l. Bidirektionale synchrone Schnittstelle mit einer einzelnen Zeitbasis
US6518800B2 (en) * 2000-05-31 2003-02-11 Texas Instruments Incorporated System and method for reducing timing mismatch in sample and hold circuits using the clock
AUPQ896300A0 (en) * 2000-07-24 2000-08-17 Nec Australia Pty Ltd A clock synchronisation method for usb sink devices
US6452541B1 (en) * 2001-02-20 2002-09-17 Motorola, Inc. Time synchronization of a satellite positioning system enabled mobile receiver and base station
FR2830954A1 (fr) * 2001-10-15 2003-04-18 St Microelectronics Sa Dispositif de transmission de donnees asynchrones comprenant des moyens de controle de deviation d'horloge
US7668243B2 (en) * 2004-05-18 2010-02-23 Texas Instruments Incorporated Audio and video clock synchronization in a wireless network

Also Published As

Publication number Publication date
PL1571531T3 (pl) 2008-02-29
DE602005002766T2 (de) 2008-07-24
ES2294632T3 (es) 2008-04-01
FR2867334A1 (fr) 2005-09-09
ATE375540T1 (de) 2007-10-15
US20050198549A1 (en) 2005-09-08
FR2867334B1 (fr) 2006-04-28
EP1571531B1 (de) 2007-10-10
US20080144755A1 (en) 2008-06-19
US7444533B2 (en) 2008-10-28
EP1571531A1 (de) 2005-09-07
US7509514B2 (en) 2009-03-24

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Legal Events

Date Code Title Description
8381 Inventor (new situation)

Inventor name: MARRON, CHRISTOPHE, ARCUEIL, FR

Inventor name: COURANT, PIERRE, ARCUEIL, FR

8364 No opposition during term of opposition