DE602004017346D1 - Kommunikationssystem mit eingebetteter synchronisation - Google Patents

Kommunikationssystem mit eingebetteter synchronisation

Info

Publication number
DE602004017346D1
DE602004017346D1 DE602004017346T DE602004017346T DE602004017346D1 DE 602004017346 D1 DE602004017346 D1 DE 602004017346D1 DE 602004017346 T DE602004017346 T DE 602004017346T DE 602004017346 T DE602004017346 T DE 602004017346T DE 602004017346 D1 DE602004017346 D1 DE 602004017346D1
Authority
DE
Germany
Prior art keywords
communication system
embedded synchronization
transmitted signal
width
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004017346T
Other languages
English (en)
Inventor
Christopher Paul Hulme Walker
Barry Michael Cook
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
4Links Ltd
Original Assignee
4Links Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GBGB0319756.3A external-priority patent/GB0319756D0/en
Application filed by 4Links Ltd filed Critical 4Links Ltd
Publication of DE602004017346D1 publication Critical patent/DE602004017346D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00Conversion of the form of the representation of individual digits
    • H03M5/02Conversion to or from representation by pulses
    • H03M5/04Conversion to or from representation by pulses the pulses having two levels
    • H03M5/14Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4295Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using an embedded synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/38Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40Transmitting circuits; Receiving circuits
    • H04L25/49Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0016Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/005Correction by an elastic buffer
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0008Synchronisation information channels, e.g. clock distribution lines
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/048Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Communication Control (AREA)
  • Mobile Radio Communication Systems (AREA)
DE602004017346T 2003-08-22 2004-08-23 Kommunikationssystem mit eingebetteter synchronisation Active DE602004017346D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GBGB0319756.3A GB0319756D0 (en) 2003-08-22 2003-08-22 An alternative data-recovery method for spacewire and improved distribution of timecodes
GBGB0325165.9A GB0325165D0 (en) 2003-08-22 2003-10-28 Communication system
PCT/GB2004/003608 WO2005020081A2 (en) 2003-08-22 2004-08-23 Communication system using embedded synchronisation

Publications (1)

Publication Number Publication Date
DE602004017346D1 true DE602004017346D1 (de) 2008-12-04

Family

ID=34219623

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004017346T Active DE602004017346D1 (de) 2003-08-22 2004-08-23 Kommunikationssystem mit eingebetteter synchronisation

Country Status (5)

Country Link
US (1) US7826566B2 (de)
EP (3) EP2028596B1 (de)
AT (1) ATE412219T1 (de)
DE (1) DE602004017346D1 (de)
WO (1) WO2005020081A2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101228132B (zh) 2005-07-26 2012-10-10 塞诺菲-安万特股份有限公司 作为Rho-激酶抑制剂的环己基胺异喹啉酮衍生物
JP4267000B2 (ja) 2006-04-03 2009-05-27 Necソフト株式会社 データ/ストローブエンコーディング方式回路およびデータ/ストローブエンコーディング方法
GB2455527B (en) * 2007-12-11 2012-10-17 Icera Inc Receiver interface
JP4678057B2 (ja) * 2009-01-09 2011-04-27 カシオ計算機株式会社 時刻情報受信装置、電波時計およびプログラム
US8630382B2 (en) * 2009-03-27 2014-01-14 Freescale Semiconductor, Inc. Asynchronous data recovery methods and apparatus
FR2963451B1 (fr) 2010-07-27 2012-12-07 St Microelectronics Rousset Authentification d'une communication multiprotocole
FR2963449B1 (fr) 2010-07-27 2013-01-25 St Microelectronics Rousset Conversion d'un bus bifilaire en bus unifilaire
FR2963519B1 (fr) * 2010-07-27 2012-08-03 St Microelectronics Rousset Protocole de communication sur bus unifilaire
JP2012242194A (ja) * 2011-05-18 2012-12-10 Casio Comput Co Ltd 電波時計
GB2505705A (en) * 2012-09-10 2014-03-12 St Microelectronics Res & Dev Circuit for combining signals comprising a plurality of edge detectors
EP2854292B1 (de) * 2013-09-30 2016-04-20 Nxp B.V. Variables resistentes Schaltungselement und Signalverarbeitungsverfahren
US9437277B1 (en) * 2015-05-21 2016-09-06 Freescale Semiconductor, Inc. Mechanism for data generation in data processing systems
US9998278B2 (en) * 2015-09-07 2018-06-12 Rohde & Schwarz Gmbh & Co. Kg Method and apparatus for synchronization of a decoding unit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5146477A (en) 1987-03-17 1992-09-08 Antonio Cantoni Jitter control in digital communication links
GB9011700D0 (en) * 1990-05-25 1990-07-18 Inmos Ltd Communication interface
US5465268A (en) * 1994-01-14 1995-11-07 The Grass Valley Group, Inc. Digital decoding of biphase-mark encoded serial digital signals
US5598417A (en) 1995-04-28 1997-01-28 Motorola, Inc. Dynamic control of a data channel in a TDM wireless communication system
US5696790A (en) * 1995-10-04 1997-12-09 Tut Systems, Inc. Method and apparatus for time dependent data transmission
US5948085A (en) 1996-08-08 1999-09-07 Thomson Consumer Electronics, Inc. Bus voltage detection and protection
JP3749347B2 (ja) * 1997-04-24 2006-02-22 富士通株式会社 データ取り込み方法、データ取り込み回路、及び、ieee1394用プロトコルコントローラ
US5942937A (en) 1997-11-19 1999-08-24 Advanced Micro Devices, Inc. Signal detection circuit using a plurality of delay stages with edge detection logic

Also Published As

Publication number Publication date
WO2005020081A3 (en) 2005-07-28
EP2028596B1 (de) 2015-04-01
EP2028596A1 (de) 2009-02-25
US20070230614A1 (en) 2007-10-04
EP1678623B1 (de) 2008-10-22
US7826566B2 (en) 2010-11-02
EP2273380A1 (de) 2011-01-12
WO2005020081A2 (en) 2005-03-03
EP2273380B1 (de) 2012-09-05
EP1678623A2 (de) 2006-07-12
ATE412219T1 (de) 2008-11-15

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