DE602004016483D1 - Elektronische Schaltungsanordnung, Vorrichtung mit solcher Anordnung und Herstellungsverfahren - Google Patents

Elektronische Schaltungsanordnung, Vorrichtung mit solcher Anordnung und Herstellungsverfahren

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Publication number
DE602004016483D1
DE602004016483D1 DE602004016483T DE602004016483T DE602004016483D1 DE 602004016483 D1 DE602004016483 D1 DE 602004016483D1 DE 602004016483 T DE602004016483 T DE 602004016483T DE 602004016483 T DE602004016483 T DE 602004016483T DE 602004016483 D1 DE602004016483 D1 DE 602004016483D1
Authority
DE
Germany
Prior art keywords
arrangement
manufacturing
electronic circuit
circuit arrangement
electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004016483T
Other languages
English (en)
Inventor
Xavier Baraton
Carlo Cognetti
Risto Tuominen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GE Embedded Electronics Oy
STMicroelectronics SA
Original Assignee
Imbera Electronics Oy
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Imbera Electronics Oy, STMicroelectronics SA filed Critical Imbera Electronics Oy
Publication of DE602004016483D1 publication Critical patent/DE602004016483D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE602004016483T 2004-07-16 2004-07-16 Elektronische Schaltungsanordnung, Vorrichtung mit solcher Anordnung und Herstellungsverfahren Expired - Lifetime DE602004016483D1 (de)

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US (1) US20080253095A1 (de)
EP (1) EP1617714B1 (de)
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WO (1) WO2006008189A1 (de)

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JP5042591B2 (ja) * 2006-10-27 2012-10-03 新光電気工業株式会社 半導体パッケージおよび積層型半導体パッケージ
US7656017B2 (en) * 2006-12-18 2010-02-02 Stats Chippac Ltd. Integrated circuit package system with thermo-mechanical interlocking substrates
SG146460A1 (en) * 2007-03-12 2008-10-30 Micron Technology Inc Apparatus for packaging semiconductor devices, packaged semiconductor components, methods of manufacturing apparatus for packaging semiconductor devices, and methods of manufacturing semiconductor components
JP5207659B2 (ja) * 2007-05-22 2013-06-12 キヤノン株式会社 半導体装置
US9953910B2 (en) 2007-06-21 2018-04-24 General Electric Company Demountable interconnect structure
US9610758B2 (en) 2007-06-21 2017-04-04 General Electric Company Method of making demountable interconnect structure
US7933128B2 (en) * 2007-10-10 2011-04-26 Epson Toyocom Corporation Electronic device, electronic module, and methods for manufacturing the same
US8264085B2 (en) 2008-05-05 2012-09-11 Infineon Technologies Ag Semiconductor device package interconnections
US8124449B2 (en) 2008-12-02 2012-02-28 Infineon Technologies Ag Device including a semiconductor chip and metal foils
US20100276793A1 (en) * 2009-04-29 2010-11-04 Manolito Galera High pin density semiconductor system-in-a-package
WO2015198870A1 (ja) * 2014-06-23 2015-12-30 株式会社村田製作所 部品内蔵基板および部品内蔵基板の製造方法
KR20160126330A (ko) * 2015-04-23 2016-11-02 삼성전자주식회사 반도체 패키지 및 이를 포함하는 3차원 반도체 패키지
US10879260B2 (en) * 2019-02-28 2020-12-29 Sandisk Technologies Llc Bonded assembly of a support die and plural memory dies containing laterally shifted vertical interconnections and methods for making the same

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US4956694A (en) * 1988-11-04 1990-09-11 Dense-Pac Microsystems, Inc. Integrated circuit chip stacking
JPH087229A (ja) * 1994-06-13 1996-01-12 Sony Corp 磁気抵抗効果型磁気ヘッド
JP2987101B2 (ja) * 1996-04-15 1999-12-06 株式会社ニッシン 半導体装置の接続方法並びに半導体装置の接続器
US5956233A (en) * 1997-12-19 1999-09-21 Texas Instruments Incorporated High density single inline memory module
US6444563B1 (en) * 1999-02-22 2002-09-03 Motorlla, Inc. Method and apparatus for extending fatigue life of solder joints in a semiconductor device
JP3619395B2 (ja) * 1999-07-30 2005-02-09 京セラ株式会社 半導体素子内蔵配線基板およびその製造方法
US6369448B1 (en) * 2000-01-21 2002-04-09 Lsi Logic Corporation Vertically integrated flip chip semiconductor package
JP2002319765A (ja) * 2000-12-27 2002-10-31 Ngk Spark Plug Co Ltd 埋め込み樹脂
US6977440B2 (en) * 2001-10-09 2005-12-20 Tessera, Inc. Stacked packages
DE10207308A1 (de) * 2002-02-21 2003-09-11 Infineon Technologies Ag Elektronische Baugruppe für integrierte Halbleiterspeicherchips

Also Published As

Publication number Publication date
EP1617714B1 (de) 2008-09-10
EP1617714A1 (de) 2006-01-18
US20080253095A1 (en) 2008-10-16
WO2006008189A1 (en) 2006-01-26

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