DE602004011937D1 - Methode zum Kalibrieren der Frequenz eines Oszillators in einer Phasenregelschleife - Google Patents

Methode zum Kalibrieren der Frequenz eines Oszillators in einer Phasenregelschleife

Info

Publication number
DE602004011937D1
DE602004011937D1 DE602004011937T DE602004011937T DE602004011937D1 DE 602004011937 D1 DE602004011937 D1 DE 602004011937D1 DE 602004011937 T DE602004011937 T DE 602004011937T DE 602004011937 T DE602004011937 T DE 602004011937T DE 602004011937 D1 DE602004011937 D1 DE 602004011937D1
Authority
DE
Germany
Prior art keywords
calibrating
oscillator
frequency
locked loop
phase locked
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004011937T
Other languages
English (en)
Inventor
Basilio Filocamo
Giuseppe Gramegna
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Publication of DE602004011937D1 publication Critical patent/DE602004011937D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/187Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
DE602004011937T 2004-09-15 2004-09-15 Methode zum Kalibrieren der Frequenz eines Oszillators in einer Phasenregelschleife Active DE602004011937D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04425685A EP1638207B1 (de) 2004-09-15 2004-09-15 Methode zum Kalibrieren der Frequenz eines Oszillators in einer Phasenregelschleife

Publications (1)

Publication Number Publication Date
DE602004011937D1 true DE602004011937D1 (de) 2008-04-03

Family

ID=34932761

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004011937T Active DE602004011937D1 (de) 2004-09-15 2004-09-15 Methode zum Kalibrieren der Frequenz eines Oszillators in einer Phasenregelschleife

Country Status (2)

Country Link
EP (1) EP1638207B1 (de)
DE (1) DE602004011937D1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110690899A (zh) * 2019-09-18 2020-01-14 广州粒子微电子有限公司 一种两点调制锁相环中高通通路的增益校准方法及其模块

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5942949A (en) * 1997-10-14 1999-08-24 Lucent Technologies Inc. Self-calibrating phase-lock loop with auto-trim operations for selecting an appropriate oscillator operating curve
GB0127537D0 (en) * 2001-11-16 2002-01-09 Hitachi Ltd A communication semiconductor integrated circuit device and a wireless communication system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110690899A (zh) * 2019-09-18 2020-01-14 广州粒子微电子有限公司 一种两点调制锁相环中高通通路的增益校准方法及其模块

Also Published As

Publication number Publication date
EP1638207B1 (de) 2008-02-20
EP1638207A1 (de) 2006-03-22

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Legal Events

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