DE60144022D1 - Umkonfigurierbares verarbeitungssystem und -verfahren - Google Patents

Umkonfigurierbares verarbeitungssystem und -verfahren

Info

Publication number
DE60144022D1
DE60144022D1 DE60144022T DE60144022T DE60144022D1 DE 60144022 D1 DE60144022 D1 DE 60144022D1 DE 60144022 T DE60144022 T DE 60144022T DE 60144022 T DE60144022 T DE 60144022T DE 60144022 D1 DE60144022 D1 DE 60144022D1
Authority
DE
Germany
Prior art keywords
vector
configuration
instruction
data
processed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60144022T
Other languages
English (en)
Inventor
John R Nickolls
Scott D Johnson
Mark Williams
Ethan Mirsky
Kambdur Kirthiranjan
Amrit Raj Pant
Lawrence J Madar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Broadcom Corp
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Application granted granted Critical
Publication of DE60144022D1 publication Critical patent/DE60144022D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8061—Details on data memory access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/325—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G06F9/3455—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results using stride

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Hardware Redundancy (AREA)
  • Electrotherapy Devices (AREA)
DE60144022T 2000-11-06 2001-11-02 Umkonfigurierbares verarbeitungssystem und -verfahren Expired - Lifetime DE60144022D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US24642300P 2000-11-06 2000-11-06
US24642400P 2000-11-06 2000-11-06
PCT/US2001/045810 WO2002037264A2 (en) 2000-11-06 2001-11-02 Reconfigurable processing system and method

Publications (1)

Publication Number Publication Date
DE60144022D1 true DE60144022D1 (de) 2011-03-24

Family

ID=26937963

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60144022T Expired - Lifetime DE60144022D1 (de) 2000-11-06 2001-11-02 Umkonfigurierbares verarbeitungssystem und -verfahren

Country Status (5)

Country Link
US (2) US6959378B2 (de)
EP (1) EP1332429B1 (de)
AT (1) ATE498158T1 (de)
DE (1) DE60144022D1 (de)
WO (1) WO2002037264A2 (de)

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Also Published As

Publication number Publication date
EP1332429A2 (de) 2003-08-06
US20050038978A1 (en) 2005-02-17
WO2002037264A2 (en) 2002-05-10
WO2002037264A3 (en) 2003-05-01
US6959378B2 (en) 2005-10-25
ATE498158T1 (de) 2011-02-15
US20020087846A1 (en) 2002-07-04
EP1332429B1 (de) 2011-02-09

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