DE60136539D1 - Gemeinsame busschnittstelle für einen digitalen signalprozessor - Google Patents

Gemeinsame busschnittstelle für einen digitalen signalprozessor

Info

Publication number
DE60136539D1
DE60136539D1 DE60136539T DE60136539T DE60136539D1 DE 60136539 D1 DE60136539 D1 DE 60136539D1 DE 60136539 T DE60136539 T DE 60136539T DE 60136539 T DE60136539 T DE 60136539T DE 60136539 D1 DE60136539 D1 DE 60136539D1
Authority
DE
Germany
Prior art keywords
digital signal
signal processor
bus interface
common bus
common
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60136539T
Other languages
English (en)
Inventor
Jean Francois Duboc
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Application granted granted Critical
Publication of DE60136539D1 publication Critical patent/DE60136539D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Microcomputers (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
DE60136539T 2000-05-16 2001-03-20 Gemeinsame busschnittstelle für einen digitalen signalprozessor Expired - Lifetime DE60136539D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/571,191 US6604163B1 (en) 2000-05-16 2000-05-16 Interconnection of digital signal processor with program memory and external devices using a shared bus interface
PCT/US2001/008855 WO2001088725A2 (en) 2000-05-16 2001-03-20 Shared bus interface for digital signal processor

Publications (1)

Publication Number Publication Date
DE60136539D1 true DE60136539D1 (de) 2008-12-24

Family

ID=24282680

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60136539T Expired - Lifetime DE60136539D1 (de) 2000-05-16 2001-03-20 Gemeinsame busschnittstelle für einen digitalen signalprozessor

Country Status (5)

Country Link
US (1) US6604163B1 (de)
EP (1) EP1285340B1 (de)
JP (1) JP2003533823A (de)
DE (1) DE60136539D1 (de)
WO (1) WO2001088725A2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6789153B1 (en) * 2001-02-20 2004-09-07 Lsi Logic Corporation Bridge for coupling digital signal processor to on-chip bus as slave
US20050081015A1 (en) * 2003-09-30 2005-04-14 Barry Peter J. Method and apparatus for adapting write instructions for an expansion bus
US7340568B2 (en) * 2005-02-11 2008-03-04 International Business Machines Corporation Reducing number of rejected snoop requests by extending time to respond to snoop request
KR100787231B1 (ko) * 2005-04-23 2007-12-21 삼성전자주식회사 고전압 발생장치, 고전압 발생방법 및 asic 칩
JP2007172333A (ja) * 2005-12-22 2007-07-05 Sanyo Electric Co Ltd バスアドレス選択回路およびバスアドレス選択方法
US7859398B2 (en) * 2006-12-13 2010-12-28 Eaton Corporation System and method for maintaining and controlling a plurality of wireless light fixtures

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0227319A3 (de) 1985-12-26 1989-11-02 Analog Devices, Inc. Befehlscachespeicher
US5301295A (en) 1991-05-22 1994-04-05 Analog Devices, Inc. Data processor apparatus and method with selective caching of instructions
US5638530A (en) * 1993-04-20 1997-06-10 Texas Instruments Incorporated Direct memory access scheme using memory with an integrated processor having communication with external devices
US5541862A (en) * 1994-04-28 1996-07-30 Wandel & Goltermann Ate Systems Ltd. Emulator and digital signal analyzer
US6088783A (en) * 1996-02-16 2000-07-11 Morton; Steven G DPS having a plurality of like processors controlled in parallel by an instruction word, and a control processor also controlled by the instruction word
GB2309324B (en) 1996-01-17 2000-09-06 Motorola Inc Method for storing repair data in a micro processor system
US6044225A (en) * 1996-03-13 2000-03-28 Diamond Multimedia Systems, Inc. Multiple parallel digital data stream channel controller
US6401196B1 (en) * 1998-06-19 2002-06-04 Motorola, Inc. Data processor system having branch control and method thereof
US6041400A (en) * 1998-10-26 2000-03-21 Sony Corporation Distributed extensible processing architecture for digital signal processing applications
EP1046998A1 (de) * 1999-04-22 2000-10-25 Texas Instruments Incorporated Digitale Signalprozessoren mit virtueller Addressierung

Also Published As

Publication number Publication date
JP2003533823A (ja) 2003-11-11
EP1285340A2 (de) 2003-02-26
WO2001088725A2 (en) 2001-11-22
EP1285340B1 (de) 2008-11-12
US6604163B1 (en) 2003-08-05
WO2001088725A3 (en) 2002-03-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition