DE60125686D1 - Falterprozessor zur Telekommunikation - Google Patents

Falterprozessor zur Telekommunikation

Info

Publication number
DE60125686D1
DE60125686D1 DE60125686T DE60125686T DE60125686D1 DE 60125686 D1 DE60125686 D1 DE 60125686D1 DE 60125686 T DE60125686 T DE 60125686T DE 60125686 T DE60125686 T DE 60125686T DE 60125686 D1 DE60125686 D1 DE 60125686D1
Authority
DE
Germany
Prior art keywords
telecommunication
butterfly processor
butterfly
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60125686T
Other languages
English (en)
Other versions
DE60125686T2 (de
Inventor
Mark Andrew Bickerstaff
Bing Xu
Christopher J Nicol
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Publication of DE60125686D1 publication Critical patent/DE60125686D1/de
Application granted granted Critical
Publication of DE60125686T2 publication Critical patent/DE60125686T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H03M13/3922—Add-Compare-Select [ACS] operation in forward or backward recursions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H03M13/3927—Log-Likelihood Ratio [LLR] computation by combination of forward and backward metrics into LLRs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3961—Arrangements of methods for branch or transition metric calculation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4161—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
    • H03M13/4169—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management using traceback
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing
    • H03M13/6505—Memory efficient implementations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6511—Support of multiple decoding rules, e.g. combined MAP and Viterbi decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6566—Implementations concerning memory access contentions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0052—Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0055—MAP-decoding
DE60125686T 2000-09-18 2001-09-11 Falterprozessor zur Telekommunikation Expired - Lifetime DE60125686T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US23336900P 2000-09-18 2000-09-18
US233369P 2000-09-18
US908000 2001-07-18
US09/908,000 US6865710B2 (en) 2000-09-18 2001-07-18 Butterfly processor for telecommunications

Publications (2)

Publication Number Publication Date
DE60125686D1 true DE60125686D1 (de) 2007-02-15
DE60125686T2 DE60125686T2 (de) 2007-10-11

Family

ID=26926860

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60125686T Expired - Lifetime DE60125686T2 (de) 2000-09-18 2001-09-11 Falterprozessor zur Telekommunikation

Country Status (4)

Country Link
US (1) US6865710B2 (de)
EP (1) EP1204211B1 (de)
JP (1) JP4907802B2 (de)
DE (1) DE60125686T2 (de)

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US7308439B2 (en) 2001-06-06 2007-12-11 Hyperthink Llc Methods and systems for user activated automated searching
KR20030005768A (ko) * 2001-07-10 2003-01-23 삼성전자 주식회사 비터비 디코더의 상태 메트릭 연산 장치
US7661059B2 (en) 2001-08-06 2010-02-09 Analog Devices, Inc. High performance turbo and Viterbi channel decoding in digital signal processors
FI20020108A0 (fi) * 2002-01-21 2002-01-21 Nokia Corp Menetelmõ ja laite polkumetriikoiden muodostamiseksi trelliksessõ
US7107509B2 (en) * 2002-08-30 2006-09-12 Lucent Technologies Inc. Higher radix Log MAP processor
SG113431A1 (en) * 2002-08-30 2005-08-29 Oki Techno Ct Singapore Pte Improved turbo decoder
EP1398881A1 (de) * 2002-09-05 2004-03-17 STMicroelectronics N.V. Kombinierter Turbo-Kode/Faltungskode Dekodierer, besonders für mobile Radio Systeme
FI20021656A0 (fi) * 2002-09-16 2002-09-16 Nokia Corp Menetelmä ja järjestely dekoodauksen suorittamiseksi
US20040255230A1 (en) * 2003-06-10 2004-12-16 Inching Chen Configurable decoder
US7200798B2 (en) * 2003-06-26 2007-04-03 Lucent Technologies Inc. Unified serial/parallel concatenated convolutional code decoder architecture and method
US7343530B2 (en) * 2004-02-10 2008-03-11 Samsung Electronics Co., Ltd. Turbo decoder and turbo interleaver
EP1762005A2 (de) * 2004-06-23 2007-03-14 Koninklijke Philips Electronics N.V. Adressierungsstrategie zur berechnung der viterbi-metrik
US7908542B2 (en) * 2004-08-25 2011-03-15 Asocs Ltd Method of and apparatus for implementing a reconfigurable trellis-type decoding
US7797618B2 (en) * 2004-12-30 2010-09-14 Freescale Semiconductor, Inc. Parallel decoder for ultrawide bandwidth receiver
US7554979B2 (en) 2005-02-03 2009-06-30 Canon Kabushiki Kaisha Communication apparatus and method having function of transmitting notification signal while hiding group identification information
GB0504483D0 (en) * 2005-03-03 2005-04-13 Ttp Communications Ltd Trellis calculations
US8745326B2 (en) * 2005-06-02 2014-06-03 Seagate Technology Llc Request priority seek manager
KR101154561B1 (ko) * 2007-06-14 2012-06-11 인텔 코오퍼레이션 컨볼루션, 터보 및 ｌｄｐｃ 코드용 통합 디코더
JP2009246474A (ja) * 2008-03-28 2009-10-22 Fujitsu Ltd ターボデコーダ
US8879670B2 (en) * 2010-09-08 2014-11-04 Agence Spatiale Europeenne Flexible channel decoder
JP5692780B2 (ja) 2010-10-05 2015-04-01 日本電気株式会社 マルチコア型誤り訂正処理システムおよび誤り訂正処理装置
US9363704B2 (en) 2014-06-20 2016-06-07 Apple Inc. Selecting a physical data channel based on application traffic pattern

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US5327440A (en) 1991-10-15 1994-07-05 International Business Machines Corporation Viterbi trellis coding methods and apparatus for a direct access storage device
US5841478A (en) * 1996-04-09 1998-11-24 Thomson Multimedia, S.A. Code sequence detection in a trellis decoder
JPH10107651A (ja) * 1996-09-27 1998-04-24 Nec Corp ビタビ復号装置
US6115436A (en) 1997-12-31 2000-09-05 Ericsson Inc. Non-binary viterbi decoder using butterfly operations
KR100557177B1 (ko) * 1998-04-04 2006-07-21 삼성전자주식회사 적응 채널 부호/복호화 방법 및 그 부호/복호 장치
CN1144378C (zh) * 1998-05-28 2004-03-31 索尼株式会社 卷积码软输出解码装置和软输出解码方法
US6460161B1 (en) 1998-06-01 2002-10-01 Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through The Communications Research Centre Processing of state histories in Viterbi decoding
US6477680B2 (en) * 1998-06-26 2002-11-05 Agere Systems Inc. Area-efficient convolutional decoder
CN1143471C (zh) 1998-12-18 2004-03-24 艾利森电话股份有限公司 快速最大后验概率译码的方法和系统
JP2000224054A (ja) * 1999-01-27 2000-08-11 Texas Instr Inc <Ti> ビタビデコ―ディングの速度を増大させる方法と装置
ES2301492T3 (es) 1999-10-05 2008-07-01 Samsung Electronics Co., Ltd. Decodificacion turbo con decodificador viterbi de salida suave.
GB2357938A (en) 1999-12-24 2001-07-04 Nokia Networks Oy Selecting one of a plurality of equalisation algorithms

Also Published As

Publication number Publication date
DE60125686T2 (de) 2007-10-11
JP2002176366A (ja) 2002-06-21
JP4907802B2 (ja) 2012-04-04
EP1204211B1 (de) 2007-01-03
US20020129320A1 (en) 2002-09-12
US6865710B2 (en) 2005-03-08
EP1204211A1 (de) 2002-05-08

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