DE60040248D1 - Integrierter Schaltkreis mit Delta-Sigma Modulator mit Zweistufenquantisierung - Google Patents

Integrierter Schaltkreis mit Delta-Sigma Modulator mit Zweistufenquantisierung

Info

Publication number
DE60040248D1
DE60040248D1 DE60040248T DE60040248T DE60040248D1 DE 60040248 D1 DE60040248 D1 DE 60040248D1 DE 60040248 T DE60040248 T DE 60040248T DE 60040248 T DE60040248 T DE 60040248T DE 60040248 D1 DE60040248 D1 DE 60040248D1
Authority
DE
Germany
Prior art keywords
delta
analog
sigma modulator
integrated circuit
digital converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60040248T
Other languages
English (en)
Inventor
Saska Lindfors
Kari Halonen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Oyj
Original Assignee
Nokia Oyj
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from FI991881A external-priority patent/FI107664B/fi
Application filed by Nokia Oyj filed Critical Nokia Oyj
Application granted granted Critical
Publication of DE60040248D1 publication Critical patent/DE60040248D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H03M3/46—Analogue/digital converters using delta-sigma modulation as an intermediate step using a combination of at least one delta-sigma modulator in series with at least one analogue/digital converter of a different type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
    • H03M1/164—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages
    • H03M1/167—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps the steps being performed sequentially in series-connected stages all stages comprising simultaneous converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/412—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M3/422—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M3/424—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a multiple bit one
DE60040248T 1999-09-03 2000-09-01 Integrierter Schaltkreis mit Delta-Sigma Modulator mit Zweistufenquantisierung Expired - Lifetime DE60040248D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI991881A FI107664B (fi) 1999-09-03 1999-09-03 Delta-sigma-modulaattori, jossa on kaksivaiheinen kvantisointi, sekä menetelmä kaksivaiheisen kvantisoinnin käyttämiseksi delta-sigma-modulaatiossa

Publications (1)

Publication Number Publication Date
DE60040248D1 true DE60040248D1 (de) 2008-10-23

Family

ID=36499605

Family Applications (2)

Application Number Title Priority Date Filing Date
DE60027830T Expired - Lifetime DE60027830T2 (de) 1999-09-03 2000-09-01 Delta-Sigma Modulator mit Zweistufenquantisierung und Verfahren zur Anwendung von Zweistufenquantisierung in Delta-Sigma Modulation
DE60040248T Expired - Lifetime DE60040248D1 (de) 1999-09-03 2000-09-01 Integrierter Schaltkreis mit Delta-Sigma Modulator mit Zweistufenquantisierung

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE60027830T Expired - Lifetime DE60027830T2 (de) 1999-09-03 2000-09-01 Delta-Sigma Modulator mit Zweistufenquantisierung und Verfahren zur Anwendung von Zweistufenquantisierung in Delta-Sigma Modulation

Country Status (4)

Country Link
EP (1) EP1681769B1 (de)
AT (1) ATE326081T1 (de)
DE (2) DE60027830T2 (de)
HK (1) HK1093123A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10833697B2 (en) * 2018-09-06 2020-11-10 Mediatek Singapore Pte. Ltd. Methods and circuits for suppressing quantization noise in digital-to-analog converters

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100235465B1 (ko) * 1996-05-29 1999-12-15 유기범 플래시형 아날로그-디지탈 변환기
US5936562A (en) * 1997-06-06 1999-08-10 Analog Devices, Inc. High-speed sigma-delta ADCs

Also Published As

Publication number Publication date
EP1681769B1 (de) 2008-09-10
DE60027830D1 (de) 2006-06-14
DE60027830T2 (de) 2006-10-26
ATE326081T1 (de) 2006-06-15
EP1681769A1 (de) 2006-07-19
HK1093123A1 (en) 2007-02-23

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