DE60025214D1 - Mikrodeckelgehäuse auf Scheibenebene - Google Patents

Mikrodeckelgehäuse auf Scheibenebene

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Publication number
DE60025214D1
DE60025214D1 DE60025214T DE60025214T DE60025214D1 DE 60025214 D1 DE60025214 D1 DE 60025214D1 DE 60025214 T DE60025214 T DE 60025214T DE 60025214 T DE60025214 T DE 60025214T DE 60025214 D1 DE60025214 D1 DE 60025214D1
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DE
Germany
Prior art keywords
cover housing
disc level
micro cover
micro
disc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60025214T
Other languages
English (en)
Other versions
DE60025214T2 (de
Inventor
Richard C Ruby
Tracy E Bell
Frank S Geefay
Yogesh M Desai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avago Technologies International Sales Pte Ltd
Original Assignee
Agilent Technologies Inc
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Application granted granted Critical
Publication of DE60025214D1 publication Critical patent/DE60025214D1/de
Publication of DE60025214T2 publication Critical patent/DE60025214T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Micromachines (AREA)
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US6919222B2 (en) * 2002-10-22 2005-07-19 Agilent Technologies, Inc. Method for sealing a semiconductor device and apparatus embodying the method
EP1465246B1 (de) * 2003-04-03 2013-12-18 Imec Methode zur Herstellung von elektrisch leitenden Durchführungen
US6908856B2 (en) 2003-04-03 2005-06-21 Interuniversitair Microelektronica Centrum (Imec) Method for producing electrical through hole interconnects and devices made thereof
DE10322751B3 (de) * 2003-05-19 2004-09-30 X-Fab Semiconductor Foundries Ag Verfahren zur Herstellung eines in Kunststoff verschlossenen optoelektronischen Bauelementes
DE10361521A1 (de) * 2003-12-03 2005-07-07 Pac Tech - Packaging Technologies Gmbh Verfahren und Vorrichtung zur wechselseitigen Kontaktierung von zwei Wafern
WO2005055288A2 (de) 2003-12-03 2005-06-16 Pac Tech - Packaging Technologies Gmbh Verfahren und vorrichtung zur wechselseitigen kontaktierung von zwei wafern
CN100388448C (zh) * 2005-02-01 2008-05-14 探微科技股份有限公司 晶片级封装的方法
KR100594952B1 (ko) * 2005-02-04 2006-06-30 삼성전자주식회사 웨이퍼 레벨 패키징 캡 및 그 제조방법
DE102018113218B3 (de) 2018-06-04 2019-09-05 RF360 Europe GmbH Waferlevel-Package und Herstellungsverfahren

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FR2579829B1 (fr) * 1985-03-29 1988-06-24 Thomson Csf Procede de fabrication de dispositifs a ondes de surface
US5798557A (en) * 1996-08-29 1998-08-25 Harris Corporation Lid wafer bond packaging and micromachining
US6265246B1 (en) * 1999-07-23 2001-07-24 Agilent Technologies, Inc. Microcap wafer-level package
US6228675B1 (en) * 1999-07-23 2001-05-08 Agilent Technologies, Inc. Microcap wafer-level package with vias

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