DE60022186D1 - Unterhaltung einer entfernten Warteschlange unter Benutzung von zwei Zählern in der Verschiebesteuerung mit Hubs und Ports - Google Patents

Unterhaltung einer entfernten Warteschlange unter Benutzung von zwei Zählern in der Verschiebesteuerung mit Hubs und Ports

Info

Publication number
DE60022186D1
DE60022186D1 DE60022186T DE60022186T DE60022186D1 DE 60022186 D1 DE60022186 D1 DE 60022186D1 DE 60022186 T DE60022186 T DE 60022186T DE 60022186 T DE60022186 T DE 60022186T DE 60022186 D1 DE60022186 D1 DE 60022186D1
Authority
DE
Germany
Prior art keywords
fifo
data
count
remote
master
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60022186T
Other languages
English (en)
Other versions
DE60022186T2 (de
Inventor
Iain Robertson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE60022186D1 publication Critical patent/DE60022186D1/de
Publication of DE60022186T2 publication Critical patent/DE60022186T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Selective Calling Equipment (AREA)
  • Image Input (AREA)
DE60022186T 2000-08-17 2000-08-17 Unterhaltung einer entfernten Warteschlange unter Benutzung von zwei Zählern in der Verschiebesteuerung mit Hubs und Ports Expired - Lifetime DE60022186T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP00307033A EP1182543B1 (de) 2000-08-17 2000-08-17 Unterhaltung einer entfernten Warteschlange unter Benutzung von zwei Zählern in der Verschiebesteuerung mit Hubs und Ports

Publications (2)

Publication Number Publication Date
DE60022186D1 true DE60022186D1 (de) 2005-09-29
DE60022186T2 DE60022186T2 (de) 2006-06-08

Family

ID=8173194

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60022186T Expired - Lifetime DE60022186T2 (de) 2000-08-17 2000-08-17 Unterhaltung einer entfernten Warteschlange unter Benutzung von zwei Zählern in der Verschiebesteuerung mit Hubs und Ports

Country Status (4)

Country Link
US (1) US6892253B2 (de)
EP (1) EP1182543B1 (de)
AT (1) ATE302969T1 (de)
DE (1) DE60022186T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003003232A2 (en) * 2001-06-29 2003-01-09 Koninklijke Philips Electronics N.V. Data processing apparatus and a method of synchronizing a first and a second processing means in a data processing apparatus
JP2005509943A (ja) * 2001-11-13 2005-04-14 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ セマフォを使用する効率的なｆｉｆｏ通信
CN100437466C (zh) * 2002-06-07 2008-11-26 Nxp股份有限公司 向/从fifo存储器读取/写入数据单元的设备和方法
US6970962B2 (en) * 2003-05-19 2005-11-29 International Business Machines Corporation Transfer request pipeline throttling
US7454538B2 (en) * 2005-05-11 2008-11-18 Qualcomm Incorporated Latency insensitive FIFO signaling protocol
US7673076B2 (en) * 2005-05-13 2010-03-02 Texas Instruments Incorporated Concurrent read response acknowledge enhanced direct memory access unit
US20090216960A1 (en) * 2008-02-27 2009-08-27 Brian David Allison Multi Port Memory Controller Queuing
US20090216959A1 (en) * 2008-02-27 2009-08-27 Brian David Allison Multi Port Memory Controller Queuing
EP2294767A2 (de) * 2008-04-09 2011-03-16 Nxp B.V. Elektronische vorrichtung und verfahren zum steuern einer elektronischen vorrichtung

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4258418A (en) * 1978-12-28 1981-03-24 International Business Machines Corporation Variable capacity data buffer system
DE3374256D1 (en) * 1983-07-28 1987-12-03 Ibm Shift register arrangement and data transmission system comprising such an arrangement
US4833651A (en) * 1986-07-24 1989-05-23 National Semiconductor Corporation High-speed, asynchronous, No-Fall-Through, first-in-first out memory with high data integrity
EP0394599B1 (de) * 1989-04-28 1994-07-20 International Business Machines Corporation Synchronisierschaltung für Datenüberträge zwischen zwei mit unterschiedlicher Geschwindigkeit arbeitenden Geräten
GB9024084D0 (en) * 1990-11-06 1990-12-19 Int Computers Ltd First-in-first-out buffer
US5450546A (en) * 1992-01-31 1995-09-12 Adaptec, Inc. Intelligent hardware for automatically controlling buffer memory storage space in a disk drive
US5644787A (en) * 1993-08-03 1997-07-01 Seiko Epson Corporation Apparatus for controlling data transfer between external interfaces through buffer memory using table data having transfer start address transfer count and unit selection parameter
US6049842A (en) * 1997-05-01 2000-04-11 International Business Machines Corporation Efficient data transfer mechanism for input/output devices
KR100251950B1 (ko) * 1997-06-26 2000-04-15 윤종용 데이타 저장장치의 버퍼 룸 로직과 그 제어방법
US6055285A (en) * 1997-11-17 2000-04-25 Qlogic Corporation Synchronization circuit for transferring pointer between two asynchronous circuits
US5884101A (en) * 1998-04-17 1999-03-16 I-Cube, Inc. Apparatus for detecting data buffer faults
JP2000031997A (ja) * 1998-07-15 2000-01-28 Fujitsu Ltd 帯域管理装置及びその方法
US6397273B2 (en) * 1998-12-18 2002-05-28 Emc Corporation System having an enhanced parity mechanism in a data assembler/disassembler for use in a pipeline of a host-storage system interface to global memory
US6401149B1 (en) * 1999-05-05 2002-06-04 Qlogic Corporation Methods for context switching within a disk controller
US6349372B1 (en) * 1999-05-19 2002-02-19 International Business Machines Corporation Virtual uncompressed cache for compressed main memory

Also Published As

Publication number Publication date
US20020120796A1 (en) 2002-08-29
ATE302969T1 (de) 2005-09-15
EP1182543A1 (de) 2002-02-27
DE60022186T2 (de) 2006-06-08
US6892253B2 (en) 2005-05-10
EP1182543B1 (de) 2005-08-24

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