DE60005701D1 - Threadumschaltungslogik in einem multithreadprozessor - Google Patents

Threadumschaltungslogik in einem multithreadprozessor

Info

Publication number
DE60005701D1
DE60005701D1 DE60005701T DE60005701T DE60005701D1 DE 60005701 D1 DE60005701 D1 DE 60005701D1 DE 60005701 T DE60005701 T DE 60005701T DE 60005701 T DE60005701 T DE 60005701T DE 60005701 D1 DE60005701 D1 DE 60005701D1
Authority
DE
Germany
Prior art keywords
switching logic
thread switching
multithread processor
multithread
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60005701T
Other languages
English (en)
Other versions
DE60005701T2 (de
Inventor
N Joy
Marc Tremblay
Gary Lauterbach
I Chamdani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of DE60005701D1 publication Critical patent/DE60005701D1/de
Publication of DE60005701T2 publication Critical patent/DE60005701T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893Caches characterised by their organisation or structure
    • G06F12/0897Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
DE60005701T 1999-05-11 2000-05-10 Threadumschaltungslogik in einem multithreadprozessor Expired - Lifetime DE60005701T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/309,733 US6341347B1 (en) 1999-05-11 1999-05-11 Thread switch logic in a multiple-thread processor
US309733 1999-05-11
PCT/US2000/012938 WO2000068780A2 (en) 1999-05-11 2000-05-10 Thread switch logic in a multiple-thread processor

Publications (2)

Publication Number Publication Date
DE60005701D1 true DE60005701D1 (de) 2003-11-06
DE60005701T2 DE60005701T2 (de) 2004-08-19

Family

ID=23199445

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60005701T Expired - Lifetime DE60005701T2 (de) 1999-05-11 2000-05-10 Threadumschaltungslogik in einem multithreadprozessor

Country Status (4)

Country Link
US (1) US6341347B1 (de)
EP (1) EP1224535B1 (de)
DE (1) DE60005701T2 (de)
WO (1) WO2000068780A2 (de)

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* Cited by examiner, † Cited by third party
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US6341347B1 (en) 2002-01-22
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