DE60001091D1 - Verfahren zur Prüfung von elektronischen Bauteilen - Google Patents

Verfahren zur Prüfung von elektronischen Bauteilen

Info

Publication number
DE60001091D1
DE60001091D1 DE60001091T DE60001091T DE60001091D1 DE 60001091 D1 DE60001091 D1 DE 60001091D1 DE 60001091 T DE60001091 T DE 60001091T DE 60001091 T DE60001091 T DE 60001091T DE 60001091 D1 DE60001091 D1 DE 60001091D1
Authority
DE
Germany
Prior art keywords
procedure
electronic components
testing electronic
testing
components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60001091T
Other languages
English (en)
Other versions
DE60001091T2 (de
Inventor
Philippe Lejeune
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SOFTLINK DOURDAN
Original Assignee
SOFTLINK DOURDAN
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SOFTLINK DOURDAN filed Critical SOFTLINK DOURDAN
Application granted granted Critical
Publication of DE60001091D1 publication Critical patent/DE60001091D1/de
Publication of DE60001091T2 publication Critical patent/DE60001091T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318335—Test pattern compression or decompression
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318328—Generation of test inputs, e.g. test vectors, patterns or sequences for delay tests
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE60001091T 1999-10-21 2000-10-19 Verfahren zur Prüfung von elektronischen Bauteilen Expired - Fee Related DE60001091T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9913396A FR2800168B1 (fr) 1999-10-21 1999-10-21 Procede de test de composants electroniques

Publications (2)

Publication Number Publication Date
DE60001091D1 true DE60001091D1 (de) 2003-02-06
DE60001091T2 DE60001091T2 (de) 2003-09-04

Family

ID=9551389

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60001091T Expired - Fee Related DE60001091T2 (de) 1999-10-21 2000-10-19 Verfahren zur Prüfung von elektronischen Bauteilen

Country Status (8)

Country Link
US (1) US6813740B1 (de)
EP (1) EP1094471B1 (de)
JP (1) JP2001202794A (de)
CN (1) CN1144233C (de)
CA (1) CA2324055A1 (de)
DE (1) DE60001091T2 (de)
FR (1) FR2800168B1 (de)
SG (1) SG93276A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7493534B2 (en) * 2003-08-29 2009-02-17 Hewlett-Packard Development Company, L.P. Memory error ranking
US7484065B2 (en) 2004-04-20 2009-01-27 Hewlett-Packard Development Company, L.P. Selective memory allocation
JP2007066246A (ja) * 2005-09-02 2007-03-15 Hitachi Ltd コントローラの自己診断システム及び方法
US9304883B2 (en) * 2014-04-25 2016-04-05 International Business Machines Corporation Testing optimization of microprocessor table functions

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06275100A (ja) * 1993-03-19 1994-09-30 Fujitsu Ltd 半導体記憶装置
US5579326A (en) * 1994-01-31 1996-11-26 Sgs-Thomson Microelectronics, Inc. Method and apparatus for programming signal timing
EP0867887A3 (de) * 1997-03-14 1998-11-25 Texas Instruments Incorporated Verfahren und Anordnung zur Messung von Speicherzugriffszeit
US6212482B1 (en) * 1998-03-06 2001-04-03 Micron Technology, Inc. Circuit and method for specifying performance parameters in integrated circuits

Also Published As

Publication number Publication date
JP2001202794A (ja) 2001-07-27
CA2324055A1 (fr) 2001-04-21
EP1094471B1 (de) 2003-01-02
FR2800168B1 (fr) 2001-12-14
DE60001091T2 (de) 2003-09-04
EP1094471A2 (de) 2001-04-25
FR2800168A1 (fr) 2001-04-27
CN1144233C (zh) 2004-03-31
SG93276A1 (en) 2002-12-17
CN1309299A (zh) 2001-08-22
US6813740B1 (en) 2004-11-02
EP1094471A3 (de) 2001-12-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee