DE4206462C1 - Regulating current of DC motor - comparing digital armature current actual value detected in cycle time not exceeding 0.2 ms with stipulated value - Google Patents

Abstract

A method of current regulation for a d.c. motor operated via two converters in a back-to-back circuit without circular currents involves using a change-over device which activates one of the converters depending on the current direction in a core. The core current is sampled and compared with a demand value. The control error is used to regulate the control loop gain. When the current direction changes a safety period is imposed during which both converters are off. ADVANTAGE - Can be implemented with digital technology to achieve quasi-continuous control equivalent to that of analogue system.

Description

The invention relates to a method for current regulation according to the preamble of claim 1. Such a method is by the DE 19 57 599 C2 known.

This known method is achieved by construction working in analog technology elements realized. This is beneficial because of the changing current rule size during normal working and braking operation of the direct current motors is immediately available to the regulation. Problems occur however, particularly in the case of high demands on the regulation due to the inevitable offset of the components. Even if higher-level regulations due to the simpler digital adaptation work, the coupling of the reporting and control functions complex. It is therefore appropriate, the current control for the DC motor on the control of the converter with digitally working elements to build. This leads to easier project planning, commissioning and Documentation of error messages. However, this worsens dynamic behavior of the control system, especially in the event of a malfunction, because the analog measured values must first be digitized so that especially when switching to operation with opposite current direction an overshoot and a delayed adjustment of the rule size to the changed circumstances (e.g. through the non-linear characteristic line of converters, the unavoidable dead time during the Um circuit and the necessary network synchronization) is achieved.

The invention has for its object the Ver drive so that it can be carried out with digital technology can and still one of the implementation with analog components equivalent quasi-continuous control results.

This object is achieved according to the invention by the characterizing features of claim 1.

Due to the short sampling cycle, there is always an Ak during operation Update of the control variables up to the point of possible intervention by the Current controller in the control of the converter (according to the periodicity of the current flow duration through the converter valves) under consideration the characteristic curve of the converter possible. As a result of the pre-control during the Switchover time when changing the direction of current becomes the necessary control chip voltage determined in good time, and it can immediately release the electricity controller with the first control pulse provided after the switchover respectively.

Advantageous embodiments of the method according to the invention are in the other claims marked.

The method according to the invention is intended to be carried out in the following game will be explained with reference to the drawing. Show it

Fig. 1 is a structural diagram for the current control according to the invention,

Fig. 2 control device for the procedural flow control and

Fig. 3 shows the timing of a current reversal when using the United procedure according to the invention.

According to FIG. 1, an armature current setpoint wi is specified as a digital value for digital current control for a direct current motor operated via two converters in a circular current-free counter-parallel connection. Accordingly, all of the functional elements mentioned below work on a digital basis. The armature current setpoint wi is limited in its rate of change for the current control by a steepness limiter 1 . The steepness limiter 1 itself is only released by a release signal SF from a switching logic explained in more detail in the description of FIG. 2.

The armature current setpoint limited by the steepness limiter 1 in the event of a change serves on the one hand via a first switch 2 as a guide variable in a comparator 3 and on the other hand is guided via a first comparator 5 to form a binary direction setpoint Ri for the armature current of the DC motor. If the signal Ri changes at the output of the first comparator 5 , this represents a request to initiate a switchover of the current direction, ie switchover from one converter to another converter via the switchover logic.

The amount of an armature current actual value xi is supplied to the comparator 3 as a controlled variable. For this purpose, the armature current is measured in an analog manner and converted into a digital variable using an analog / digital converter (not shown). This digital variable is available again as a current value at least every 0.2 ms, so that quasi-continuous regulation of the armature current is possible.

The amount of the actual armature current value is formed in an amount generator 6 before it is fed to the comparator 3 . Accordingly, it is necessary to specify the armature current setpoint according to the actual direction Rxi of the armature current. This is achieved via the first switch 2 . According to the actual armature current direction Rxi detected at the converters, there is either a switch position through which the (limited) armature current setpoint is given directly to the comparator 3 or through which the armature current setpoint is first multiplied by (-1) via a first multiplier 4 before it serves as a reference variable in comparator 3 .

The control deviation determined in the comparator 3 is fed to a downstream PI controller: in this first the proportional gain is formed in a second multiplier 9 by multiplying the control deviation by an (adjustable) proportionality factor P. The output variable of the multiplier is given on the one hand directly to a first summing element 14 and on the other hand to the one input of a third multiplier 10 . This forms the integral part of the amplification in that it is given a high or a (relatively) low integration time constant I1 or I2 to the second input in a known manner, depending on whether the armature current is missing or not. The third multiplier 10 is followed by an integrating control amplifier 13 , the output size of which is also given to the first summing element 14 .

The output of the first summing element 14 is connected to the input of a characteristic line element 19 . In the characteristic curve element 19 , the inverse, non-linear characteristic curve for the control of the current through the converter is filed as a function of a control signal ust. A linearization of the control signal ust, which is fed to the (not shown) control set of the respectively active converter, is thus achieved in such a way that the loop gain of the control loop is kept constant over the entire working range.

Both the control amplifier 13 and the first summing element 14 and also the characteristic element 19 are only activated by the switching logic ( FIG. 2) to be explained (and in particular during a switching process) by an enable signal RF.

The digital armature current actual value xi is used to connect the suitable integration time constants I1 or I2 to the integrating control amplifier 13 . For this purpose, this is conducted via a second comparator 7 , by means of which it is determined whether the armature current is greater than zero (xi <0). This signal is made available to the control device shown in FIG. 2 and is given to an input of a first AND gate 11 . Another input of this first AND gate 11 is located at the output of a timing element 8 , which is also initiated with the enable signal RF by the switching logic towards the end of a switching operation. The output signal of the first AND gate 11 controls a second switch 12 for specifying the larger integration time constant I2 both when the current is not incomplete (xi <0) and during a time determined by the timing element 8 immediately after a switchover process has ended (ie from the release of the current regulator) ).

Simplified represented symbolically (since in reality carried out by further comparators), the second comparator 7 also serves to detect overcurrents xim 1 and xim 2, ie in both armature current directions, due to which the comparator 7 depending on the current armature current direction signal Rxi for one or the other direction takes effect. If an overcurrent is detected, the signals xim 1 and xim 2 block the current controller by blocking the enable signal RF and blocking the delivery of main and secondary ignition pulses at the control rate of the active, controlled by main and secondary ignition pulses from its control rate Power converter.

The armature voltage of the direct current motor is also detected and made available via a further (not shown) analog / digital converter as the actual armature voltage value xu with a cycle time of 0.2 ms. The armature voltage actual value xu is used on the one hand to determine via a third comparator 16 whether the EMF of the motor is present (signal E <0). On the other hand, the armature voltage actual value xu is entered into a second summing element 15 , to which the product of the armature current setpoint wi with the armature resistance R, ie the value wi × R, is also applied.

The output variable of the second summing element 15 is input to a computing element 17 . During a changeover from one converter to another to achieve an armature current direction change, the armature actual voltage value xu is namely equal to the source voltage E of the motor. If, in addition to this EMF component, the ohmic component of the voltage resulting from the future voltage drop across the armature resistor R of the DC motor is taken into account, the future stationary output value of the current regulator required after the switchover can be calculated in advance. The controller output can then be precontrolled if it is also ensured that the calculation is carried out in good time. Since the values for the armature voltage actual value xu are updated with a cycle time of 0.2 ms, but the minimum switchover interval is 0.6 ms, it is possible with the arithmetic element 17 to provide the future output value of the current regulator in good time and to the input of the first summing element 14 intrude. When the control amplifier 13 , the first summing element 14 and the characteristic element 19 are released , this pre-control of the controller then acts in the sense of a faster adaptation of the actual armature current value to the newly specified armature current setpoint value, which is changed in its direction.

An actual value monitoring of the armature voltage of the direct current motor takes place in the control of the current regulator close to the converter. To this end, an equivalent member are shown in FIG. 2 24 supplied to the binary signals on the presence of a rotational speed (n <0) and a coexisting EMF (E <0, corresponding to the output of the third comparator 16 in Fig. 1). If unequal, a third switch 18 is actuated the 17 at the output of the calculator Glienicke on a signal output from the equivalence gate 24 signal EF and instead of the value of the feedforward control, the value uv connected to the first summing element 14 0th Incorrect pilot control due to the failure of the measured values of the armature voltage and the speed is therefore excluded.

In FIG. 2, 25 is a switching logic which, when the armature current setpoint polarity changes, that is to say when a different current direction is requested (signal Ri at the output of the first comparator 5 in FIG. 1), initiates a sequential control system, the chronological sequence of which is further below In connection with Fig. 3 is explained.

According to Fig. 2 of the switching logic 25 other than the binary signals Ri and EF of equivalence member 24 nor the output signals of a second AND gate 20 and an OR gate 21 are supplied. On the input side, the AND gate 20 receives signals S1, S2, S3 as safety signals for releasing the digital current control according to FIG. 1 by the switching logic 25 after a fault. The signals S1, S2, S3 come from a higher-level control (e.g. speed control) or its monitoring device, the overcurrents (e.g. xim 1 <0; xim 2 <0 according to FIG. 1), fuses or the like supervised.

For safety reasons, the output of the second AND gate 20 and an output of the switching logic 25 is connected to a third AND gate 23 , which amplifies the signal RF to release the integrating control amplifier 13 , the first summing element 14 , the characteristic element 19 and the Releases timer 8 at the end of a switching process. This signal RF is fed back to one input of the switching logic 25 .

The detection of the signal essential for a switchover that the armature current actual value is zero (or inversely xi <0 here), and for additional security, because the current is zero and. U. can be detected too imprecisely, the detection of the current flow duration SDE 1 or SDE 2 by each of the converters (or inversely the presence of a reverse voltage on one or the other converter) takes place via the OR gate 21 .

In the course of switching, the switching logic 25 next to the enable signal is via the third AND gate 23 (controller release RF) nor the ball heitsbegrenzer 1 (in Fig. 1) free after a switch by the signal SF. With IF1, IF2 and IFF release pulses at the output of the switching logic 25 to release the main ignition pulses to one or the other converter and to release the secondary ignition pulses are designated.

In Fig. 3 the time course is shown with a switching operation of the set in motion via the switching logic 25 Flow control:

As soon as the request for a change in direction of the armature current occurs, for. B. from working mode to the braking mode of the DC motor, that is, a change of the signal Ri (time t = 1) is first the control amplifier 13 , the first summing element 14 and the characteristic curve 19 by resetting the signal RF and the output of secondary ignition pulses by the tax rate of the active converter controlled with main and secondary ignition pulses by resetting the signal IFF (a). The main firing pulses are maintained to initially secure the further armature current. This state of the switchover logic is designated as ZU = 1.

Then it is checked (time t = 2) whether the armature current is zero, ie the signals xi <0, SDE 1 or SDE 2 (depending on the active current judge) are not present. As can be seen from FIG. 3, the amount is | xi | of the armature current actual value has become zero at the time t = 2, ie the inverse signal <0 and SDE 1 or SDE 2 are present. This test state is designated as state ZU = 2 of the switchover logic 25 . Then the switching logic 25 in the state CLOSE = 3 also the main ignition pulses IF 1 (b) or IF 2 (b) at time t = 3. Now starts a safety time ts at time t = 4, during which the Ven tile of the previously active converter have the opportunity to achieve their full blocking ability in the forward direction. This safety time is adjustable. You can e.g. B. 1.4 ms. During this time, every cycle tz of the digital control (0.2 ms), as shown as an example at the time t = 5, checks whether the armature current actual value is still zero. For the switchover logic 25, this is referred to as state CLOSE = 4.

The switching process is interrupted as soon as an armature current value xi <0 occurs at times t = 3 or one of the cycles during the safety time. The sequential control then runs with the states ZU = 2. . . 3 of the switching logic 25 before the safety time ts starts again.

If no armature current flow was detected during the safety time ts, the delivery of the main and secondary ignition pulses is released by the delivery of the signals IF 1 or IF2 and IFF by the tax rate of the converter to be reactivated at time t = 6. Now the current controller, ie the control amplifier 13 , the first summing element 14 , the characteristic element 19 and the timing element 8 (see FIG. 1) is released by outputting the signal RF at the output of the AND element 23 caused by the switching logic 25 ( Fig. 2) and the release of the steepness limiter 1 ( Fig. 1) by outputting the signal SF at time t = 7 in synchronization with the occurrence of the first main ignition pulse. This represents the state CLOSE = 5 of the switchover logic 25 .

The switching process is now complete. The armature current flows in the opposite direction. The direction signal Rxi for the armature current changes accordingly, as a result of which the actual armature current value | xi | increases the first switch 2 in FIG. 1 is actuated so that the specification of the armature current setpoint wi is now supplied to the comparator 3 in accordance with the polarity.

Generally the occurrence of signals of any kind within the stream control including the switching device monitored so that as (here not shown) Lifetime monitoring the absence of these signals at a time immediate shutdown of the active converter leads.

Of course there is also a for the operation of the DC motor Field current controller with PI algorithm, also with separately adjustable ones Parameters such as gain and time constant, additionally present, however not shown in the figures. Again, the amount of the controlled variable formed and depending on the comparison with the reference variable an output voltage supplied to the tax rate for the field converter, the leads to an adjustment of the actual value to the setpoint. The field current actual value is also set with adjustable comparators for overcurrent, under current and the value zero is monitored. The results are the parent Control reported or lead to controller inhibit of the field current controller.

Both the control of the switchover logic 25 into the individual states ZU = 1 ... 5 and the entire current control shown in FIG. 1 can be carried out as a computing program. It is preferably written as a high-level language task in the C programming language. Since the program parts armature current control and changeover logic operate with a cycle time of t 0.2 ms, the short computing times ensure quasi-analog control so that the actual values no longer need to be averaged.

Claims (6)

1.Current control method for a DC motor operated via two converters in a current-free counter-parallel connection with a switching device which activates one of the two converters depending on a given armature current direction and with a current controller for both armature current directions, which has a different intensity depending on the level of the armature current has time constant and which, depending on the control deviation of the armature current actual value from the armature current setpoint and its output quantity, specifies the control angle for the headset of the respectively active converter, characterized in that

• - That the armature current is detected with a cycle time of 0.2 ms and be compared as a digital armature current actual value with the armature current setpoint also specified as a digital quantity and that the digital control variable formed from the control deviation by the current controller for the tax rate corresponding to the non-linear control characteristic of the active converter is reshaped so that the loop gain of the control loop remains constant over the entire working range,
• - That the switching device, as soon as an armature current direction change is required for operational reasons, the digitally operating current controller and the output of secondary ignition pulses to the active converter controlled with main and secondary ignition pulses are blocked by the headset, then it is checked whether the armature current value is equal to zero, and depending on this, the main ignition pulses are also blocked and then an adjustable safety time is waited before the delivery of main and secondary ignition pulses for the other converter to be reactivated is released and the polarity for the armature current setpoint of the current controller is reversed is also released for this converter at the same time as the first main ignition pulse occurs
• - And that the armature voltage of the DC motor is detected as a digital variable with a cycle time of 0.2 ms and during each switchover break taking into account the control characteristic of the converter to be activated for calculating the corresponding digital control variable at the output of the current controller after switching and there this control variable is activated when the current controller is enabled, provided that the speed and the source voltage of the DC motor are available simultaneously, taking into account the expected ohmic voltage drop of the controlled system.

2. The method according to claim 1, characterized, that for checking whether the armature current actual value is equal to zero definable response limit with additional monitoring the duration of the current flow through the active converter as AND Condition is taken into account. 3. The method according to any one of claims 1 or 2, characterized, that after a required change in the armature current direction, the switchover process is interrupted as soon as an armature current actual value is higher is recorded as zero, then it is checked again whether a Armature current direction change is requested and again ge it is checked whether the armature current actual value is now zero before the safety time starts again and the delivery of the main and subsequent ignition pulses for the converter to be reactivated will give. 4. The method according to any one of claims 1 to 3, characterized, that the smaller integration time constant when the current is released controller only takes effect after a delay at the end of a switchover process. 5.The method according to one of claims 1 to 4, characterized, that the armature current actual value to an overcurrent for both converters is monitored separately and in the event of an overcurrent, both the current regulator as well as the output of the main and secondary ignition pulses blocked will.   6. The method according to any one of claims 1 to 5, characterized, that the appearance of signals of any kind within the stream control including the switching device is monitored and the lack of these signals for an immediate shutdown of the active Converters leads.