DE4003070A1 - Void-free solder joint of semiconductor die on substrate - by precoating die back surface with solder to form dome surface and attaching die by placing on substrate - Google Patents

Void-free solder joint of semiconductor die on substrate - by precoating die back surface with solder to form dome surface and attaching die by placing on substrate

Info

Publication number
DE4003070A1
DE4003070A1 DE19904003070 DE4003070A DE4003070A1 DE 4003070 A1 DE4003070 A1 DE 4003070A1 DE 19904003070 DE19904003070 DE 19904003070 DE 4003070 A DE4003070 A DE 4003070A DE 4003070 A1 DE4003070 A1 DE 4003070A1
Authority
DE
Germany
Prior art keywords
die
soldering
substrate
solder
semiconductor body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19904003070
Other languages
German (de)
Inventor
Herbert Maier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefunken Electronic GmbH
Original Assignee
Telefunken Electronic GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefunken Electronic GmbH filed Critical Telefunken Electronic GmbH
Priority to DE19904003070 priority Critical patent/DE4003070A1/en
Publication of DE4003070A1 publication Critical patent/DE4003070A1/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399—Material
    • H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83455—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01058—Cerium [Ce]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys

Abstract

Soldering of a semiconductor die onto a substrate features precoating of the die-surface to be soldered onto with solder at such a temp that a domed solder surface is formed. The die is then placed on the substrate, touching this with the top of the dome. The soldering operations are pref carried out in a reducing ambient. The substrate used is pref Cu, the surface on which the die is to be attached is pref roughened by etching and Ni-coated. The solder used is pref a SnPb- alloy. USE/ADVANTAGE - The presence of the dome allows a joint to be made without including gas evolved during the soldering operation. This allows solder joints to be made without voids. The process is used for the assembly of die of power semiconductor devices.

Description

In der Halbleitertechnik werden bekanntlich Halbleiter­ körper von Halbleiterbauelementen wie z. B. Transisto­ ren oder Dioden auf einen Trägerkörper aufgelötet. Da­ bei kommt es darauf an, daß der Halbleiterkörper lun­ kerfrei auf den Trägerkörper aufgelötet wird.As is well known, semiconductors are used in semiconductor technology body of semiconductor devices such. B. Transisto Ren or diodes soldered onto a carrier body. There it is important that the semiconductor body lun is soldered to the carrier body in a kerf-free manner.

Der Erfindung liegt die Aufgabe zugrunde, ein Verfahren zum Auflöten eines Halbleiterkörpers auf einen Träger­ körper anzugeben, welches ein lunkerfreies Auflöten des Halbleiterkörpers auf den Trägerkörper gewährleistet. Diese Aufgabe wird durch ein Verfahren mit den Merkma­ len des Anspruchs 1 gelöst.The invention has for its object a method for soldering a semiconductor body onto a carrier body to indicate which a blow-free soldering of the Semiconductor body guaranteed on the carrier body. This task is accomplished through a process using the characteristics len of claim 1 solved.

Die Erfindung wird im folgenden an einem Ausführungs­ beispiel erläutert.The invention is based on an embodiment example explained.

Das Ausführungsbeispiel befaßt sich mit dem Auflöten des Halbleiterkörpers eines Transistors auf eine Trä­ gerplatte, die bei einem Transistor auch als Kollektor­ platte bezeichnet wird, weil der Halbleiterkörper eines Transistors den Leitungstyp der Kollektorzone hat und deshalb auch als Kollektorkörper bezeichnet wird. Die­ ser Kollektorkörper wird auf die Kollektorplatte auf­ gelötet, die im allgemeinen als Kollektoranschluß ver­ wendet wird. Die Basiszone und die Emitterzone werden auf der der Kollektorplatte gegenüberliegenden Oberflä­ chenseite in den Kollektorkörper eingebracht.The embodiment is concerned with soldering of the semiconductor body of a transistor on a Trä with a transistor also as a collector plate is called because the semiconductor body of a Transistor has the conduction type of the collector zone and is therefore also referred to as a collector body. The This collector body is placed on the collector plate soldered, which ver generally as collector connection  is applied. The base zone and the emitter zone will be on the surface opposite the collector plate introduced into the collector body.

Gemäß der Erfindung wird der Halbleiterkörper 1 des Transistors vor dem Auflöten auf einen Trägerkörper (Kollektorplatte) nach der Fig. 1 vorbelotet. Das Vor­ beloten des Halbleiterkörpers 1 erfolgt gemäß der Fig. 1 auf derjenigen Oberflächenseite, mit der der Halbleiterkörper 1 auf den Trägerkörper aufgelötet wird. Diese Oberflächenseite weist in der Fig. 1 nach oben. Das Vorbeloten des Halbleiterkörpers 1 erfolgt nach der Fig. 1 dadurch, daß ein Lot 2 in reduzieren­ der Atmosphäre auf den Halbleiterkörper 1 aufgeschmol­ zen wird. Die Temperatur wird beim Vorbeloten so ge­ wählt, daß das Lot 2 nicht zerfließt, sondern gemäß der Fig. 1 eine Kuppe bildet. Beim Aufschmelzen muß eine Ronde gebildet werden und somit kein Band, sonst bildet sich keine gleichmäßige Kuppe aus. Das lunkerfreie Lö­ ten ist deshalb erforderlich, damit zwischen dem Halb­ leiterkörper und dem Trägerkörper ein möglichst guter elektrischer Kontakt erzielt wird, und außerdem soll z. B. bei Leistungstransistoren eine gute Wärmeleitung vom Halbleiterkörper zum Trägerkörper erfolgen. Auch dafür ist eine lunkerfreie Lötung erforderlich.According to the invention, the semiconductor body 1 of the transistor is pre-soldered before soldering onto a carrier body (collector plate) according to FIG. 1. Before soldering the semiconductor body 1 is carried out according to FIG. 1 on that surface side with which the semiconductor body 1 is soldered onto the carrier body. This surface side points upwards in FIG. 1. The preliminary soldering of the semiconductor body 1 is carried out according to FIG. 1 in that a solder 2 is melted on the semiconductor body 1 in reduce the atmosphere. The temperature is so selected during pre-soldering that the solder 2 does not flow, but forms a dome according to FIG. 1. When melting, a round blank must be formed and therefore no band, otherwise no uniform crest is formed. The void-free Lö th is therefore necessary so that the best possible electrical contact is achieved between the semi-conductor body and the support body, and also z. B. with power transistors good heat conduction from the semiconductor body to the carrier body. A void-free soldering is also required for this.

Während die Fig. 1 den vorbeloteten Halbleiterkörper 1 mit der Lotkuppe 2 im Querschnitt zeigt, zeigt die Fig. 2 den vorbeloteten Halbleiterkörper 1 in der Drauf­ sicht.While FIG. 1 shows the pre-soldered semiconductor body 1 with the solder dome 2 in cross section, FIG. 2 shows the pre-soldered semiconductor body 1 in a top view.

Nach dem Vorbeloten gemäß den Fig. 1 und 2 wird der vorbelotete Halbleiterkörper 1 gemäß der Fig. 3 auf den Trägerkörper 3 aufgelötet. Beim Auflöten des vorbe­ loteten Halbleiterkörpers 1 zeigt die Lotkuppe 2 gemäß der Fig. 3 nach unten, d. h. der vorbelotete Halblei­ terkörper 1 wird mit seiner vorbeloteten Seite, die bei der Fig. 3 nach unten weist, auf die Kollektorplatte 3 aufgelegt und mit der Kollektorplatte 3 verlötet. We­ sentlich ist, daß beim Auflöten des vorbeloteten Halb­ leiterkörpers 1 auf den Trägerkörper 3 sich der Träger­ körper 3 unter dem vorbeloteten Halbleiterkörper 1 be­ findet, und nicht umgekehrt.After pre-soldering according to FIGS . 1 and 2, the pre-soldered semiconductor body 1 according to FIG. 3 is soldered onto the carrier body 3 . When soldering the vorbe soldered semiconductor body 1 shows the solder dome 2 according to FIG. 3 downwards, ie the pre-soldered semiconductor body 1 is placed with its pre-soldered side, which points downwards in FIG. 3, on the collector plate 3 and with the collector plate 3 soldered. It is significant that when soldering the pre-soldered semiconductor body 1 to the carrier body 3 , the carrier body 3 is under the pre-soldered semiconductor body 1 , and not vice versa.

Die Kollektorplatte 3 besteht beispielsweise aus Kup­ fer. Sie wird so vorbehandelt, daß eine gute Benetzung gewährleistet ist. Um dies zu erreichen, wird die Kol­ lektorplatte rauhgebeizt und beispielsweise mattver­ nickelt. Dies geschieht am besten stromlos.The collector plate 3 consists, for example, of copper fer. It is pretreated so that good wetting is guaranteed. To achieve this, the collector plate is rough-pickled and matt nickel-plated, for example. This is best done without electricity.

Wie bereits zum Ausdruck gebracht, muß der Trägerkörper beim Verlöten mit dem vorbeloteten Halbleiterkörper un­ ten liegen. Erfolgt die Lötung umgekehrt, so entstehen Lunker. Der Schmelzvorgang beim Löten beginnt am höchsten Punkt der Lotkuppe und verdrängt somit das beim Löten vorherrschende Gas nach außen. Dadurch wird die Entstehung von Lunkern vermieden.As already expressed, the carrier body when soldering with the pre-soldered semiconductor body un ten lie. If the soldering is carried out the other way round, so arise Blowholes. The melting process during soldering begins on highest point of the solder tip and thus displaces that prevailing gas to the outside during soldering. This will the formation of cavities avoided.

Im Ausführungsbeispiel wird beispielsweise eine Blei-/Zinnlegierung (z. B. Pb/Sn 60/40) verwendet. Das Löten erfolgt beispielsweise in einem Durchlaufofen.In the exemplary embodiment, for example Lead / tin alloy (e.g. Pb / Sn 60/40) is used. The For example, soldering takes place in a continuous furnace.

Claims (6)

1. Verfahren zum Auflöten eines Halbleiterkörpers auf einen Trägerkörper, dadurch gekennzeichnet, daß dieje­ nige Oberflächenseite des Halbleiterkörpers, mit der der Halbleiterkörper auf den Trägerkörper aufgelötet wird, vor dem Auflöten des Halbleiterkörpers vorbelotet wird, daß die Temperatur beim Vorbeloten so gewählt wird, daß das auf den Halbleiterkörper aufgebrachte Lot nicht zerfließt, sondern eine Kuppe bildet, und daß der Halbleiterkörper mit der Kuppe nach unten auf den unter dem Halbleiterkörper befindlichen Trägerkörper aufgelö­ tet wird.1. A method for soldering a semiconductor body to a carrier body, characterized in that the surface surface of the semiconductor body with which the semiconductor body is soldered onto the carrier body is prebooted before the soldering of the semiconductor body, that the temperature is selected during the soldering so that the solder applied to the semiconductor body does not flow, but forms a dome, and that the semiconductor body with the dome is dissolved on the carrier body located under the semiconductor body. 2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß das Vorbeloten und/oder das Auflöten in reduzieren­ der Atmosphäre erfolgt.2. The method according to claim 1, characterized in that that pre-soldering and / or soldering in reduce the atmosphere takes place. 3. Verfahren nach Anspruch 1 oder 2, dadurch gekenn­ zeichnet, daß das Auflöten des Halbleiterkörpers auf den Trägerkörper in reduzierender Atmosphäre erfolgt.3. The method according to claim 1 or 2, characterized records that the soldering of the semiconductor body the carrier body takes place in a reducing atmosphere. 4. Verfahren nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß der Trägerkörper aus Kupfer be­ steht. 4. The method according to any one of claims 1 to 3, characterized characterized in that the support body made of copper be stands.   5. Verfahren nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, daß das Lot aus einer Blei-/Zinn-Legie­ rung besteht.5. The method according to any one of claims 1 to 4, characterized characterized in that the solder from a lead / tin alloy tion exists. 6. Verfahren nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, daß der Trägerkörper auf der dem Halb­ leiterkörper zugewandten Seite rauhgebeizt und ver­ nickelt wird.6. The method according to any one of claims 1 to 5, characterized characterized in that the carrier body on the half side facing the conductor body roughly pickled and ver is nodding.
DE19904003070 1990-02-02 1990-02-02 Void-free solder joint of semiconductor die on substrate - by precoating die back surface with solder to form dome surface and attaching die by placing on substrate Ceased DE4003070A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19904003070 DE4003070A1 (en) 1990-02-02 1990-02-02 Void-free solder joint of semiconductor die on substrate - by precoating die back surface with solder to form dome surface and attaching die by placing on substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19904003070 DE4003070A1 (en) 1990-02-02 1990-02-02 Void-free solder joint of semiconductor die on substrate - by precoating die back surface with solder to form dome surface and attaching die by placing on substrate

Publications (1)

Publication Number Publication Date
DE4003070A1 true DE4003070A1 (en) 1991-08-08

Family

ID=6399275

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19904003070 Ceased DE4003070A1 (en) 1990-02-02 1990-02-02 Void-free solder joint of semiconductor die on substrate - by precoating die back surface with solder to form dome surface and attaching die by placing on substrate

Country Status (1)

Country Link
DE (1) DE4003070A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10304469A1 (en) * 2003-02-04 2004-08-19 FNE Forschungsinstitut für Nichteisen-Metalle Freiberg GmbH Soft solder alloy, for soldering aluminum materials, is based on tin with light metals in a solid intermetallic phase during soldering and forming a further metal oxide during or after soldering
DE102013105079A1 (en) * 2013-05-17 2014-12-18 Koki Technik Transmission Systems Gmbh Method for producing a switching shaft

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD125559A1 (en) * 1976-04-08 1977-05-04
DE3042085C2 (en) * 1979-11-12 1984-09-13 Hitachi, Ltd., Tokio/Tokyo Semiconductor device
DE3442538A1 (en) * 1983-12-21 1985-07-04 BBC Aktiengesellschaft Brown, Boveri & Cie., Baden, Aargau Process for soldering semiconductor components
DE3406542A1 (en) * 1984-02-23 1985-08-29 Telefunken electronic GmbH, 7100 Heilbronn Process for fabricating a semiconductor component
DE3412742C1 (en) * 1984-04-05 1985-10-10 Kernforschungsanlage Jülich GmbH, 5170 Jülich Process and device for preparing metal surfaces for thermal joining processes
DE3513530A1 (en) * 1984-06-01 1985-12-05 Bbc Brown Boveri & Cie METHOD FOR THE PRODUCTION OF PERFORMANCE SEMICONDUCTOR MODULES WITH INSULATED STRUCTURE
DD240347A1 (en) * 1985-08-19 1986-10-29 Pentacon Dresden Veb PROCESS FOR CONNECTING FLEXIBLE PRINTED WIRING STRUCTURES
DD246263A1 (en) * 1986-01-20 1987-06-03 Inst Fuer Nachrichtentechnik METHOD OF MANUFACTURING METAL HUGS ON CONNECTING SURFACES

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD125559A1 (en) * 1976-04-08 1977-05-04
DE3042085C2 (en) * 1979-11-12 1984-09-13 Hitachi, Ltd., Tokio/Tokyo Semiconductor device
DE3442538A1 (en) * 1983-12-21 1985-07-04 BBC Aktiengesellschaft Brown, Boveri & Cie., Baden, Aargau Process for soldering semiconductor components
DE3406542A1 (en) * 1984-02-23 1985-08-29 Telefunken electronic GmbH, 7100 Heilbronn Process for fabricating a semiconductor component
DE3412742C1 (en) * 1984-04-05 1985-10-10 Kernforschungsanlage Jülich GmbH, 5170 Jülich Process and device for preparing metal surfaces for thermal joining processes
DE3513530A1 (en) * 1984-06-01 1985-12-05 Bbc Brown Boveri & Cie METHOD FOR THE PRODUCTION OF PERFORMANCE SEMICONDUCTOR MODULES WITH INSULATED STRUCTURE
DD240347A1 (en) * 1985-08-19 1986-10-29 Pentacon Dresden Veb PROCESS FOR CONNECTING FLEXIBLE PRINTED WIRING STRUCTURES
DD246263A1 (en) * 1986-01-20 1987-06-03 Inst Fuer Nachrichtentechnik METHOD OF MANUFACTURING METAL HUGS ON CONNECTING SURFACES

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
- CHASE, E.N. *
- Reflow Solder Joint with Extended Height. In: IBM Technical Disclosure Bulletin, Vol. 28, No. 7, Dec. 1985, S. 2871 *
- TAN, K.S. *
BOSE, D.: Rapidly Solidified Solder Foil for Die Attachment Application. In: Solid State Technology, April 1986, S. 165-168 *
Dry Soldering Process using Halogenated Gas. In: IBM Technical Disclosure Bulletin, Vol. 27, No. 11, April 1985, S. 6513 *
MASCH, K.G.: Semiconductor Solder reflow Chip Substrate Joining. In: IBM Techni- cal Disclosure Bulletin, Vol. 16, No. 8, Jan. 1974, S. 2675 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10304469A1 (en) * 2003-02-04 2004-08-19 FNE Forschungsinstitut für Nichteisen-Metalle Freiberg GmbH Soft solder alloy, for soldering aluminum materials, is based on tin with light metals in a solid intermetallic phase during soldering and forming a further metal oxide during or after soldering
DE102013105079A1 (en) * 2013-05-17 2014-12-18 Koki Technik Transmission Systems Gmbh Method for producing a switching shaft

Similar Documents

Publication Publication Date Title
DE60219779T2 (en) FLUX-FREE FLIP CHIP CONNECTION
DE1665648B1 (en) Method for the mutual electrical connection of circuits
DE2442159A1 (en) PROCESS FOR JOINING FLAT SIDES TOGETHER AND COMPONENTS PRODUCED BY THE PROCESS
DE2748350A1 (en) HEAT DRAIN DEVICE FOR MONOLITHICALLY INTEGRATED SEMI-CONDUCTOR CIRCUITS
DE2229070A1 (en) METHOD OF ATTACHING A SEMICONDUCTOR BODY TO A SUBSTRATE
DE1807615A1 (en) Process for forming and fastening fastening points on workpieces
DE1052572B (en) Electrode system which contains a semiconducting single crystal with at least two parts of different types of conduction, e.g. B. crystal diode or transistor
DE3040867C2 (en) Method for manufacturing a semiconductor device
DE4003070A1 (en) Void-free solder joint of semiconductor die on substrate - by precoating die back surface with solder to form dome surface and attaching die by placing on substrate
DE2318736A1 (en) METHOD OF SEALING COVERINGS FOR ELECTRICAL COMPONENTS
DE3137570A1 (en) Method of directly bonding copper parts to oxide-ceramic substrates
DE1098103B (en) Method for installing an electrical semiconductor element in a housing
DE2528000A1 (en) Large area solder application - involves application of solder repellant grid over silvering paste and dip or flow soldering
DE2238569C3 (en) Method for soldering a semiconductor board
DE2728330A1 (en) Fluxless soldering of contacts and/or semiconductor slices - using solder preforms which are aligned in a jig and heated
DE1083936B (en) Greater performance semiconductor electric device and method of manufacturing such a device
AT203550B (en) Semiconductor device and method for manufacturing the same
EP0675531B1 (en) Process for electrically interconnecting contacts
DE1439056A1 (en) Method for connecting an electrode of a semiconductor arrangement to a contact part
DE1930545A1 (en) Semiconductor device, in particular a package structure for a semiconductor device
DE2934299A1 (en) METHOD FOR CONNECTING A CONTACT PART MADE OF HIGH-MELTING METAL TO A SEMICONDUCTOR BODY
AT212379B (en) Method for manufacturing a semiconductor component
DE2237616A1 (en) Applying palladium layer onto electrode of semiconductor - before encap-sulation in glass, to improve electric contact
AT227840B (en) Semiconductor device
DE2355501C3 (en) Process for the production of soldering points with a soft solder on a gold layer

Legal Events

Date Code Title Description
OM8 Search report available as to paragraph 43 lit. 1 sentence 1 patent law
OP8 Request for examination as to paragraph 44 patent law
8131 Rejection