DE3137570A1 - Method of directly bonding copper parts to oxide-ceramic substrates - Google Patents

Method of directly bonding copper parts to oxide-ceramic substrates

Info

Publication number
DE3137570A1
DE3137570A1 DE19813137570 DE3137570A DE3137570A1 DE 3137570 A1 DE3137570 A1 DE 3137570A1 DE 19813137570 DE19813137570 DE 19813137570 DE 3137570 A DE3137570 A DE 3137570A DE 3137570 A1 DE3137570 A1 DE 3137570A1
Authority
DE
Germany
Prior art keywords
copper
ceramic substrate
contact pins
oxide
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19813137570
Other languages
German (de)
Inventor
Altan 6148 Heppenheim Akyürek
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AKYUEREK, ALTAN, DIPL.-ING., WIEN, AT
Original Assignee
Brown Boveri und Cie AG Germany
BBC Brown Boveri AG Germany
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE3036128A external-priority patent/DE3036128C2/en
Application filed by Brown Boveri und Cie AG Germany, BBC Brown Boveri AG Germany filed Critical Brown Boveri und Cie AG Germany
Priority to DE19813137570 priority Critical patent/DE3137570A1/en
Publication of DE3137570A1 publication Critical patent/DE3137570A1/en
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H05K3/4015—Surface contacts, e.g. bumps using auxiliary conductive elements, e.g. pieces of metal foil, metallic spheres
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/38—Selection of media, e.g. special atmospheres for surrounding the working area
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B37/00—Joining burned ceramic articles with other burned ceramic articles or other articles by heating
    • C04B37/02—Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles
    • C04B37/021—Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles in a direct manner, e.g. direct copper bonding [DCB]
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B37/00—Joining burned ceramic articles with other burned ceramic articles or other articles by heating
    • C04B37/02—Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles
    • C04B37/023—Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles characterised by the interlayer used
    • C04B37/026—Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles characterised by the interlayer used consisting of metals or metal salts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/02—Aspects relating to interlayers, e.g. used to join ceramic articles with other articles by heating
    • C04B2237/12—Metallic interlayers
    • C04B2237/124—Metallic interlayers based on copper
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/02—Aspects relating to interlayers, e.g. used to join ceramic articles with other articles by heating
    • C04B2237/12—Metallic interlayers
    • C04B2237/126—Metallic interlayers wherein the active component for bonding is not the largest fraction of the interlayer
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/30—Composition of layers of ceramic laminates or of ceramic or metallic articles to be joined by heating, e.g. Si substrates
    • C04B2237/32—Ceramic
    • C04B2237/34—Oxidic
    • C04B2237/343—Alumina or aluminates
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/30—Composition of layers of ceramic laminates or of ceramic or metallic articles to be joined by heating, e.g. Si substrates
    • C04B2237/40—Metallic
    • C04B2237/403—Refractory metals
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/30—Composition of layers of ceramic laminates or of ceramic or metallic articles to be joined by heating, e.g. Si substrates
    • C04B2237/40—Metallic
    • C04B2237/407—Copper
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/50—Processing aspects relating to ceramic laminates or to the joining of ceramic articles with other articles by heating
    • C04B2237/54—Oxidising the surface before joining
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/50—Processing aspects relating to ceramic laminates or to the joining of ceramic articles with other articles by heating
    • C04B2237/62—Forming laminates or joined articles comprising holes, channels or other types of openings
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/50—Processing aspects relating to ceramic laminates or to the joining of ceramic articles with other articles by heating
    • C04B2237/86—Joining of two substrates at their largest surfaces, one surface being complete joined and covered, the other surface not, e.g. a small plate joined at it's largest surface on top of a larger plate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4009—Loop shape
    • H01L2224/40095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01042—Molybdenum [Mo]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01052—Tellurium [Te]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301—Thyristor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structural Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Manufacturing Of Electrical Connectors (AREA)

Abstract

The invention relates to a method of directly bonding copper parts to oxide-ceramic substrates in accordance with the Main Application P 3036128.5, and to a semiconductor component fabricated by said method and comprising an oxide-ceramic substrate (1) as base plate, on which contact pins (2) having thickened base section (3) and/or attachment bows (8) for making contact to the semiconductor components (6) and/or circular blanks (5) for soldering on the semiconductor components (6) are mounted. The parts to be mounted are composed of copper or are copper-plated and have a superficial copper oxide layer. The direct bonding of the ceramic substrate (1) to the copper parts (2, 85) mounted on it is carried out by heating in a vacuum oven above the eutectic temperature of copper and copper oxide but below the melting point of copper, in accordance with the Main Application P 3036128.5. The ceramic substrate (1) may be clad with copper foils (4) which serve as conductor tracks.

Description

Verfahren zum direkten Verbinden von Kupferteilen mitMethod for directly connecting copper parts with

Oxidkeramiksubstraten Die Erfindung bezieht sich auf ein Verfahren zum direkten Verbinden von Kupferteilen mit Oxidkeramiksubstraten gemäß dem Oberbegriff des Patentanspruchs 1.Oxide Ceramic Substrates The invention relates to a method for the direct connection of copper parts with oxide ceramic substrates according to the preamble of claim 1.

Ein solches Verfahren ist aus der Hauptanmeldung P 30 36 128.5 bekannt.Such a method is known from the main application P 30 36 128.5.

Mit Hilfe dieses bekannten Verfahrens wird vorteilhaft eine blasenfreie Verbindung zwischen Kupferfolie und Keramik und gleichzeitig eine praktisch oxidfreie Kupferoberfläche erzielt.With the help of this known method, a bubble-free one is advantageous Connection between copper foil and ceramic and at the same time practically oxide-free Copper surface achieved.

Zum Aufbau eines Halbleiterbauelementes, beispielsweise eines Stromrichtermoduls, werden auf das mit Kupferfolie beschichtete Keramiksubstrat Molyhd#n-Kupfer-Ronden, Befestigungsklips und Ansch]ußstecker gelötet. Dies erfordert in nachteiliger Weise einen zusätzlichen Arbeitsschritt.For the construction of a semiconductor component, for example a converter module, Molyhd # n copper discs are placed on the ceramic substrate coated with copper foil, Fastening clips and connection plugs are soldered. This requires in disadvantageous Way an additional work step.

Der Erfindung liegt davon ausgehend die Aufgabe zugrunde, die Herstellung von Halbleiterbauelementen mit Hilfe des bekannten Verfahrens weiter zu vereinfachen.On this basis, the invention is based on the object of producing of semiconductor components using the known method to further simplify.

Diese Aufgabe wird durch die im Anspruch 1 gekennzeichneten Merkmale gelöst.This object is achieved by the features characterized in claim 1 solved.

Die mit der Erfindung erzielbaren Vorteile bestehen insbesondere darin, daß ein Arbeitsschritt (Löten) bei der Herstellung eines Halbleiterbauelements eingespart werden kann. Der Fortfall der Lotschicht hat auch zur Folge, daß vorteilhaft ein Übergangswiderstand (Strom-und Wärmeübergang)- entfällt.The advantages that can be achieved with the invention are, in particular, that one work step (soldering) in the production of a semiconductor component is saved can be. The omission of the solder layer also has the consequence that an advantageous Contact resistance (current and heat transfer) - not applicable.

Vorteilhafte Weiterbildungen der Erfindung sind den Unteransprüchen entnehmbar.Advantageous further developments of the invention are set out in the subclaims removable.

Ausführungsbeispiele der Erfindung sind nachfolgend anhand der Zeichnungen erläutert.Embodiments of the invention are shown below with reference to the drawings explained.

Es zeigen-: Fig. 1 ein Kerami#ksubstrat mit Kontaktstift und Ronde, Fig. 2 ein Keramiksubstrat mit Befestigungsbügeln, Fig. 3 ein Keramiksubstrat mit Befestigungsklips, Fig. 4 ein Keramiksubstrat mit direkt aufgebrach#ten Kupferteilen, Fig. 5 den -Einsatz einer Lochfolie als Montagehilfe, Fig. 6 ein aus zwei Ebenen bestehendes B#auteil.They show: FIG. 1 a ceramic substrate with a contact pin and a round blank, FIG. 2 shows a ceramic substrate with mounting brackets, FIG. 3 shows a ceramic substrate Fastening clips, Fig. 4 a ceramic substrate with directly applied copper parts, 5 shows the use of a perforated film as an assembly aid, FIG. 6 shows one of two levels existing building part.

In Fig. 1 ist ein plattenförmiges Keramiksubstrat (A1203) 1 dargestellt, auf dem im Verfahren gemäß Hauptanmeldung P 30 36 128.5 ein Kontaktstift (Kopf#draht) 2 mit verdicktem Fußteil 3 aufgebracht ist Mit Bezugszeichen 4 ist eine als Leiterbahn dienende, zwischen Stift 2 und Substrat 1 angeordnete Kupferfolie bezeichnet. Der Kontaktstift 2 kann als massiver Kupferdraht oder als ein mit einer Kupferschicht ummantelter Eisendraht ausgebildet sein und dient als externer Anschluß des Halbleiterbauelementes.In Fig. 1, a plate-shaped ceramic substrate (A1203) 1 is shown, on the contact pin (head # wire) in the procedure according to the main application P 30 36 128.5 2 is applied with a thickened foot part 3. Reference numeral 4 is a conductor track serving, copper foil arranged between pin 2 and substrate 1 designated. The contact pin 2 can be made as a solid copper wire or as a with a Be formed with a copper layer sheathed iron wire and serves as an external connection of the semiconductor component.

Auf dem Keramiksubstrat 1 ist ferner auf einer als Leiterbahn dienenden weiteren Kupferfolie 4 eine Molyhdän-Kupfer-Ronde 5 im Verfahren gemäß Hauptanmeldung P 30 36 128.5 aufgebracht. Die Ronde 5 dient als Distanzplättchen für ein Halbleiterelement 6. Der Einsatz eines derartigen Distanzplättchens ist aus der DE-AS 24 00 863 bekannt. Das Distanzplä.ttchen dient insbesondere zur Erhöhung der Sperrfähigkeit des Halbleiterelementes 6. Als Halbleiterelemente 6 werden vorzugsweise beidseitig lotbeschichtete Chips, z.B.On the ceramic substrate 1 is also on a serving as a conductor track further copper foil 4 a molybdenum copper round blank 5 in the process according to the main application P 30 36 128.5 applied. The round blank 5 serves as a spacer plate for a semiconductor element 6. The use of such a spacer plate is known from DE-AS 24 00 863. The spacer plate serves in particular to increase the blocking capacity of the semiconductor element 6. Chips coated with solder on both sides are preferably used as semiconductor elements 6, e.g.

Transistoren, Dioden oder Thyristoren verwendet. Der eine Hauptanschluß des Halbleiterelementes 6 ist mit der Molybdän-Kupfer#Ronde 5 verlötet. Der weitere Hauptanschluß des Halbleiterelementes 6 ist mit einem Befestigungsklips 7 verlötet. Der Befestigungsklip 7 wird auf den Kontaktstift 2 aufgesteckt.Transistors, diodes or thyristors are used. The one main line of the semiconductor element 6 is soldered to the molybdenum-copper round blank 5. The other one The main connection of the semiconductor element 6 is soldered to a fastening clip 7. The fastening clip 7 is pushed onto the contact pin 2.

Zur Montage des in Fig. 1 dargestellten Bauteiles wird das Halbleiterelement 6 auf die Molybdän-Kupfer-Ronde 5 des bereits mit dem Kontaktstift 2 und der Ronde 5 versehenenen Keramiksubstrates 1 aufgebracht und verlötet. Danach wird der Befestigungsklip 7 auf den Kontaktstift 2 aufgesteckt und mit dem Halbleiterelement 6 verlötet.To assemble the component shown in Fig. 1, the semiconductor element 6 on the molybdenum-copper round blank 5 of the already with the contact pin 2 and the round blank 5 provided ceramic substrate 1 applied and soldered. Then the fastening clip 7 placed on the contact pin 2 and soldered to the semiconductor element 6.

In Fig. 1 ist desweiteren eine Aufsicht des plattenförmigen Keramiksubstrates 1 dargestellt, die insbesondere die Ausführung des Befestigungsklips 7 zeigt. Bei Verwendung eines Thyristors oder Transistors als Halb- leiterelement 6 weist der Befestigungsklip 7 eine Mittelbohrung zur Durchfüfirung des Steueranschlusses des Halbleiterelementes 6 auf.In Fig. 1 is further a plan view of the plate-shaped ceramic substrate 1, which shows in particular the design of the fastening clip 7. at Use of a thyristor or transistor as a half ladder element 6, the fastening clip 7 has a central bore for carrying out the control connection of the semiconductor element 6.

In Fig. 2 ist ein plattenförmiges Keramiksubstrat 1 dargestellt, auf dem im Verfahren gemäß Hauptanmeldung P 30 36 128.5 auf einer als Leiterbahn dienenden Kupferfolie 4 ein Befestigungsbügel 8 sowie eine Kupfer-Molybdän-Ronde 5 aufgebracht sind. Auf die Ronde 5 ist, wie bereits unter Fig. 1 beschrieben, ein Halbleiterelement 6 aufgelötet.In Fig. 2, a plate-shaped ceramic substrate 1 is shown on that in the process according to the main application P 30 36 128.5 on a serving as a conductor track Copper foil 4, a mounting bracket 8 and a copper-molybdenum round blank 5 are applied are. As already described under FIG. 1, a semiconductor element is attached to the round blank 5 6 soldered on.

Da die Molybdän-Kupfer-Ronde 5 direkt mit dem Keramiksubstrat 1 in Verbindung steht, d.h. ohne zusätzliche Lötverbindung, entfällt vorteilhaft der thermische und elektrische Wärmeübergangswiderstand zwischen Lötmaterial und Kupfer. Mit Hilfe des erweiterten Verfahrens gemäß Hauptanmeldung P 30 36 128.5 werden somit vorteilhaft zwei gleiche Metalle, nämlich Kupferfolie 4 und verkupferte Ronde 5 verbunden bzw. verschmolzen. Durch das Aufbringen der Ronde 5 auf das Keramiksubstrat wird zudem eine vorfixierte Auflagestelle für das Halbleiterelement 6 geschaffen, was für die Montage von Vorteil ist.Since the molybdenum-copper round blank 5 is directly connected to the ceramic substrate 1 in If the connection is established, i.e. without an additional soldered connection, the thermal and electrical heat transfer resistance between solder and copper. With the help of the extended method according to the main application P 30 36 128.5 advantageously two identical metals, namely copper foil 4 and copper-plated round blank 5 connected or fused. By applying the round blank 5 to the ceramic substrate a pre-fixed support point for the semiconductor element 6 is also created, which is advantageous for the assembly.

Der weitere Anschluß des Halbleiterelemtes 6 ist mit dem Bügel 8 verlötet. In Fig. 2 ist ferner eine Aufsicht auf das Keramiksubstrat 1 dargestellt, die insbesondere die Ausführung des Befestigungsbügels 8 zeigt. Um eine sichere Verbindung des Bügels 8 auf dem Substrat 1 zu gewährleisten, ist der Kontaktfuß 8a im Vergleich zum schmalen Bügel stark vergrößert. Bei Einsatz eines-Transistors oder Thyristors als Halbleiterelement 6 weist der verlötete Anschluß des Bügels 8 eine Bohrung zur Durchführung des Steueranschlusses des Halbleiter- elementes 6 auf.The other connection of the semiconductor element 6 is soldered to the bracket 8. In Fig. 2 also shows a plan view of the ceramic substrate 1 is shown, in particular the execution of the mounting bracket 8 shows. To ensure a secure connection of the bracket To ensure 8 on the substrate 1, the contact foot 8a is compared to the narrow one Temple greatly enlarged. When using a transistor or thyristor as a semiconductor element 6, the soldered connection of the bracket 8 has a bore for the implementation of the control connection of the semiconductor element 6.

In Fig. 3 ist ein plattenförmiges Keramiksubstrat 1 dargestellt, auf dem im Verfahren gemaß Hauptanmeldung P 30 36 128.5 auf einer als Leiterbahn dienenden Kupferfolie 4 ein Kontaktstift 2 mit verdicktem Fußteil 3 sowie eine Molybdän-Kupfer-Ronde 5 aufgebracht sind. Auf der Ronde 5 ist ein Halbleiterelement 6 aufgelötet. Auf den Steueranschluß bzw. den einen Hauptanschluß des Halbleiterelementes 6 ist ein Kontaktstift 10 aufgelötet. Der elektrische Anschluß zwischen den Kontaktstiften 2 und 10 wird durch einen aufgesteckten Befestigungsklip 9 getätigt. In Fig. 3 ist ferner eine Aufsicht auf das Keramiksubstrat 1 dargestellt, die die AusfUhrung des Befestigungsklips 9 zeigt. Da die Kontaktstifte 2 und 10 vorfixierte Anschlüsse darstellen, ist die Montage von Halbleiteranordnungen in einfacher und schneller Weise ohne komplizierte Lötformen und schwieriges Ausrichten, insbesondere des Befestigungsbilgels für den Steueranschluß durch einfaches Aufstecken der Befestigungsklipse 9 möglich. Da die elektrisch leitenden Klipse ein sehr kleines Format besitzen und in einer engen Toleranz aufgelegt werden müssen, bedeutet der Fortfall der komplizierten Lötformen einen großen Vorteil.In Fig. 3, a plate-shaped ceramic substrate 1 is shown on that in the process according to main application P 30 36 128.5 on one serving as a conductor track Copper foil 4, a contact pin 2 with a thickened base part 3 and a molybdenum-copper round blank 5 are applied. A semiconductor element 6 is soldered onto the round blank 5. on the control terminal or the one main terminal of the semiconductor element 6 is a Contact pin 10 soldered on. The electrical connection between the contact pins 2 and 10 is made by a clip 9 attached. In Fig. 3 is also shows a plan view of the ceramic substrate 1, which shows the execution of the Fastening clips 9 shows. Since the contact pins 2 and 10 are pre-fixed connections represent, the assembly of semiconductor devices in easier and faster Way without complicated soldering shapes and difficult alignment, especially of the fastening bracket for the control connection by simply plugging in the fastening clips 9. Since the electrically conductive clips have a very small format and in a close tolerance must be imposed, means the elimination of the complicated Solder molds have a great advantage.

Außer den in den Figuren 1 bis 3 beschriebenen Kontaktstiften 2, Molybdän-Kupfer-Ronden 5 und Befestigungsbügel 8 können auch beispielsweise Ronden aus anderen Metallen, Kupferlnseln (Podeste), oder Anschlußklemmen im erweiterten Verfahren gemäß Hauptanmeldung P 30 36 128.5 auf das Keramiksubstrat 1 aufgebracht werden. Auf eine Kupferinsel kann dabei z.B. ebenfalls ein beidseitig lotbesohichteter Halbleiterchip aufgelötet werden.Apart from the contact pins 2 described in FIGS. 1 to 3, molybdenum-copper discs 5 and mounting bracket 8 can also, for example, discs made of other metals, Copper islands (platforms) or connection terminals in the extended procedure according to the main application P 30 36 128.5 are applied to the ceramic substrate 1. On a copper island For example, a semiconductor chip coated with solder on both sides can also be soldered on will.

In Fig. 4 sind auf einem Keramiksubstrat 1 ein Kontaktstift 2 mit verdicktem Fußteil, eine Molybdän-Kupfer-Ronde 5 sowie ein Befe#stigungsb#gel 8 direkt, d.h.In Fig. 4, a contact pin 2 are on a ceramic substrate 1 with thickened foot part, a molybdenum-copper round blank 5 and a fastening bracket 8 directly, i.e.

ohne eine Kupferfolie #, im Verfahren gemäß Hauptanmeldung P 30 36 128.5 aufgebracht. Diese AusfUhrungsform ist dann vorteilhaft, wenn keine Leiterbahnen aus Kupferfolie auf dem Keramiksubstrat 1 aufzubringen sind.without a copper foil #, in the process according to main application P 30 36 128.5 applied. This embodiment is advantageous when there are no conductor tracks are to be applied from copper foil on the ceramic substrate 1.

In Fig. 5 ist eine Lochfolie 11 gezeigt, die zur Fixierung der Kontaktstifte 2 auf dem Keramiksubstrat 1 dient. Diese Folie fixiert während des Verfahrens gemäß Hauptanmeldung P 30 36 128.5 im Ofen die einzelnen Kontaktstifte 2 in der vorgeschriebenen Lage und wir-d nach Beendigung des Ofenprozesses entfernt. Der Einsatz solcher Lochfolien 11 ist insbesondere bei Serienfabrikation vorteilhaft.In Fig. 5, a perforated film 11 is shown, which is used to fix the contact pins 2 on the ceramic substrate 1 is used. This film is fixed during the process according to Main application P 30 36 128.5 in the oven the individual contact pins 2 in the prescribed Location and will be removed after the furnace process is complete. The use of such perforated foils 11 is particularly advantageous in series production.

In Fig. 6 ist dargestellt, wie sich durch das direkte Aufbringen der Kontaktstifte 2 auf das Keramiksubstrat 1 im Verfahren gemäß Hauptanmeldung P 30 36 128.5 vorteilhaft eine Halbleiteranordnung mit mehreren Keramiksubstrat-Ebenen 1 aufbauen läßt. Mit der untersten Keramikebene 1 sind die Kontaktstifte 2 direkt verbunden (bzw. über eine als Leiterbahn dienende Kupferfolie).In Fig. 6 it is shown how the direct application of the Contact pins 2 on the ceramic substrate 1 in the method according to main application P 30 36 128.5 advantageously a semiconductor arrangement with several ceramic substrate levels 1 can be built up. The contact pins 2 are directly connected to the lowest ceramic level 1 connected (or via a copper foil serving as a conductor track).

Die oberen Ebenen weisen Bohrungen 12 zur Durchführung der Kontaktstifte 2 auf. Auf den einzelnen Ebenen sind Molybdän-Kupfer-Ronden 5 zum Auflöten von Halbleiterelementen 6 angeordnet. Mit Hilfe von Befestigungsklips 7 (siehe Fig. 1) ist ein Anschluß von verschiedenen Halbleiterelementen 6 in verschiedenen Ebenen an den gleichen Kontaktstift 2 möglich. Die oberen Keramikebenen können zudem mit elektronischen Bauteilen, wie Widerständen, Kondensatoren und weiteren aktiven und passiven Bauteilen zur Ansteuerung der Halbleiterelemen te 6 bestückt werden. Diese zusätzl#chen Bauteile können auch in Dünnfilmtechnik auf das Keramiksubstrat 1 aufgebracht werden.The upper levels have holes 12 for the implementation of the contact pins 2 on. On the individual levels there are molybdenum-copper blanks 5 for soldering semiconductor elements 6 arranged. With the help of fastening clips 7 (see Fig. 1) is a connection of different semiconductor elements 6 in different planes on the same Contact pin 2 possible. The upper ceramic levels can also be equipped with electronic Components such as resistors, capacitors and other active and passive components for controlling the semiconductor elements te 6 can be fitted. These Additional components can also be applied to the ceramic substrate 1 using thin-film technology will.

Zum Aufbringen der Molybdän-Kupfer-Ronden 5, der Kontaktstifte 2 oder der als Podeste dienenden Kupferronden und Kupfer inseln auf das Keramiksubstrat 1 im Verfahren gemäß Hauptanmeldung P 30 36 128.5 wird das mit einer Kupferoxld-Schicht behaftete Kupferteil bzw. das verkupferte Teil auf das mit einer rauhen Oberflache versehene Keramiksubstrat 1 gelegt und in einem Ofen auf eine Temperatur von ca. 10700c bis 10750C gebracht. Falls Leiterbahnen auf dem Keramiksubstrat 1 vorgesehen sind, wird die oxidierte Kupferfolie ebenfalls aufgebracht. Im Ofen herrscht eine Stickstoff-Atmosphäre unter Zusatz von wenig Sauerstoff.For applying the molybdenum-copper blanks 5, the contact pins 2 or the copper discs and copper islands serving as pedestals onto the ceramic substrate 1 in the process according to the main application P 30 36 128.5 this is done with a copper oxide layer afflicted copper part or the copper-plated part on the one with a rough surface provided ceramic substrate 1 and placed in an oven to a temperature of approx. Brought 10700c to 10750C. If conductor tracks are provided on the ceramic substrate 1 the oxidized copper foil is also applied. There is one in the oven Nitrogen atmosphere with the addition of a little oxygen.

Das Aufbringen der Kupferteile bzw. verkupferten Teile kann dabei, wie oben erwähnt, während eines einzigen Vorganges im Ofen gleichzeitig mit dem Aufbringen der Kupferfolie 4 erfolgen oder es können in einem ersten Vorgang die Kupferfolie 4 auf das Keramiksubstrat 1 und danach in einem zweiten Vorgang die Kupferteile bzw.The application of the copper parts or copper-plated parts can as mentioned above, during a single operation in the oven simultaneously with the Applying the copper foil 4 or it can be done in a first process Copper foil 4 on the ceramic substrate 1 and then in a second process the Copper parts or

verkupferten Teile auf die Kupferfolie 4 aufgebracht werden,copper-plated parts are applied to the copper foil 4,

Claims (5)

Ansprüche S Verfahren zum direkten Verbinden von Kupferfolien, die oberflächlich eine Kupferoxidschicht tragen, mit Oxidkeramiksubstraten durch Erhitzen des mit der Kupferfolie belegten Keramiksubstrats in sauerqtoffhaltiger Atmosphäre bis zu einer Temperatur oberhalb der eutektischen Temperatur von Cu und Cu20, aber unterhalb der Schmelztemperatur von Cu, wobei das Erhitzen im Vakuumofen bei einem Druck von höchstens 1 mbar durchgef-hrt und in der Ofenatmosphäre ein Sauerstoff-Partialdruek zwischen 0,001 und 0,1 mbar aufrechterhalten wird nach Patentanmeldung P 30 36 128.5, dadurch gekennzeichnet, daß auf das als Grundplatte dienende Oxidkeramiksubstrat Kontaktstifte mit ihrem verdickten Fußteil und/oder Befestigungsbilgel zur Kontaktierung von Halbleiterelementen und/oder Ronden zum Auflöten von Halbleiterelementen aufgebracht werden, wobei die Kontaktstifte, Refestigunasbael und Ronden aus Kupfer bestehen bzw. verkupfert sind. Claims S method for direct joining of copper foils, the Wear a layer of copper oxide on the surface, with oxide ceramic substrates by heating of the ceramic substrate covered with the copper foil in an oxygen-containing atmosphere up to a temperature above the eutectic temperature of Cu and Cu20, but below the melting temperature of Cu, heating in a vacuum furnace at a Pressure of no more than 1 mbar and an oxygen partial pressure in the furnace atmosphere between 0.001 and 0.1 mbar is maintained according to patent application P 30 36 128.5, characterized in that on the oxide ceramic substrate serving as the base plate Contact pins with their thickened foot part and / or fastening bracket for contacting applied by semiconductor elements and / or round blanks for soldering semiconductor elements the contact pins, Refestigunasbael and round blanks are made of copper or are copper-plated. 2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß die Kontaktstifte und/oder Befestigungsbügel und/oder Ronden auf eine Kupferfolie aufgebracht werden. 2. The method according to claim 1, characterized in that the contact pins and / or mounting brackets and / or discs are applied to a copper foil. 3. Verfahren nach einem der vorstehenden Ansprüche, dadurch gekennzeichnet, daß zur Fixierung der Kontaktstifte eine Lochfolie eingesetzt wird. 3. The method according to any one of the preceding claims, characterized in, that a perforated film is used to fix the contact pins. 4. Verwendung des nach einem der vorstehenden Ansprüche hergestellten Erzeugnisses, dadurch gekennzeichnet, daß ein Halbleiterhauelement gebildet wird, das wenigstens zwei plattenförmig übereinander angeordnete Keramiksubstrate aufweist#, wobei auf die auf dem als Grundplatte dienenden Keramiksubstrat (1) aufgebrachten Kontaktstifte (2) das darfiberliegende Keramiksubstrat (1) mit Bohrungen (12) zur Durchführung dieser Kontaktstifte (2) aufgesteckt wird. 4. Use of the prepared according to one of the preceding claims Product, characterized in that a semiconductor component is formed, the has at least two ceramic substrates arranged one above the other in the form of a plate #, being applied to the ceramic substrate (1) serving as a base plate Contact pins (2) the overlying ceramic substrate (1) with holes (12) for Implementation of these contact pins (2) is attached. 5. Verwendung des nach einem der vorstehenden Ansprüche hergestellten Erzeugnisses, dadurch gekennzeichnet, daR ein Halbleiterbauelement gebildet wird, bei dem die elektrische Kontaktierung von einem aufgebrachten Kontaktstift zu einem Halbleiterelement über einen aufsteckbaren Betestigungsklip (7,9) erfolgt. 5. Use of the prepared according to one of the preceding claims Product, characterized in that a semiconductor component is formed, in which the electrical contact is made from an applied contact pin to a Semiconductor element takes place via an attachable fastening clip (7,9).
DE19813137570 1980-09-25 1981-09-22 Method of directly bonding copper parts to oxide-ceramic substrates Granted DE3137570A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19813137570 DE3137570A1 (en) 1980-09-25 1981-09-22 Method of directly bonding copper parts to oxide-ceramic substrates

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3036128A DE3036128C2 (en) 1980-09-25 1980-09-25 Process for direct bonding of copper foils to oxide ceramic substrates
DE19813137570 DE3137570A1 (en) 1980-09-25 1981-09-22 Method of directly bonding copper parts to oxide-ceramic substrates

Publications (1)

Publication Number Publication Date
DE3137570A1 true DE3137570A1 (en) 1983-03-31

Family

ID=25788074

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19813137570 Granted DE3137570A1 (en) 1980-09-25 1981-09-22 Method of directly bonding copper parts to oxide-ceramic substrates

Country Status (1)

Country Link
DE (1) DE3137570A1 (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3147789A1 (en) * 1981-12-03 1983-06-09 Brown, Boveri & Cie Ag, 6800 Mannheim Power module and method of producing it
DE3412651A1 (en) * 1984-04-04 1985-10-17 Brown, Boveri & Cie Ag, 6800 Mannheim Method for producing a power semiconductor module
EP0191419A2 (en) * 1985-02-14 1986-08-20 Asea Brown Boveri Aktiengesellschaft Semiconductor power module with integrated heat pipe
DE3633907A1 (en) * 1986-08-02 1988-02-04 Altan Akyuerek Method for firmly bonding a copper body to a substrate
DE3930859A1 (en) * 1988-09-20 1990-04-05 Peter H Maier Brazing copper and/or ceramic elements - using oxide-coated copper (alloy) foil
EP0431725A2 (en) * 1989-09-25 1991-06-12 General Electric Company Direct bonded metal-substrate structures
US5382830A (en) * 1990-12-18 1995-01-17 Akyuerek; Altan Semiconductor module with multi-plane conductive path
EP1988569A3 (en) * 2007-04-26 2008-12-10 Siemens Aktiengesellschaft Method of manufacturing a terminal of a power semiconductor component and electronic component with a terminal manufactured in this manner
CN102276284A (en) * 2010-06-14 2011-12-14 Ixys半导体有限公司 Method for the manufacture of double-sided metallized ceramic substrates
DE102018128097A1 (en) * 2018-11-09 2020-05-14 Infineon Technologies Ag SEMICONDUCTOR POWER MODULE AND METHOD FOR PRODUCING A SEMICONDUCTOR POWER MODULE

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1915839A1 (en) * 1968-04-10 1969-11-06 Itt Ind Gmbh Deutsche Mounting method for a semiconductor element on a socket
DE1439273B2 (en) * 1961-12-15 1972-12-21 Semikron Gesellschaft fur Gleich nchterbau und Elektronik mbH, 850O Nurn berg METHOD FOR MANUFACTURING SEMICONDUCTOR ARRANGEMENTS
DE2400863B2 (en) * 1974-01-09 1980-04-24 Brown, Boveri & Cie Ag, 6800 Mannheim Method for contacting the electrodes of a disk-shaped semiconductor element

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1439273B2 (en) * 1961-12-15 1972-12-21 Semikron Gesellschaft fur Gleich nchterbau und Elektronik mbH, 850O Nurn berg METHOD FOR MANUFACTURING SEMICONDUCTOR ARRANGEMENTS
DE1915839A1 (en) * 1968-04-10 1969-11-06 Itt Ind Gmbh Deutsche Mounting method for a semiconductor element on a socket
DE2400863B2 (en) * 1974-01-09 1980-04-24 Brown, Boveri & Cie Ag, 6800 Mannheim Method for contacting the electrodes of a disk-shaped semiconductor element

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3147789A1 (en) * 1981-12-03 1983-06-09 Brown, Boveri & Cie Ag, 6800 Mannheim Power module and method of producing it
DE3412651A1 (en) * 1984-04-04 1985-10-17 Brown, Boveri & Cie Ag, 6800 Mannheim Method for producing a power semiconductor module
EP0191419A2 (en) * 1985-02-14 1986-08-20 Asea Brown Boveri Aktiengesellschaft Semiconductor power module with integrated heat pipe
EP0191419A3 (en) * 1985-02-14 1988-07-27 Brown, Boveri & Cie Aktiengesellschaft Semiconductor power module with integrated heat pipe
DE3633907A1 (en) * 1986-08-02 1988-02-04 Altan Akyuerek Method for firmly bonding a copper body to a substrate
DE3930859A1 (en) * 1988-09-20 1990-04-05 Peter H Maier Brazing copper and/or ceramic elements - using oxide-coated copper (alloy) foil
EP0431725A2 (en) * 1989-09-25 1991-06-12 General Electric Company Direct bonded metal-substrate structures
EP0431725A3 (en) * 1989-09-25 1991-11-06 General Electric Company Direct bonded metal-substrate structures
US5382830A (en) * 1990-12-18 1995-01-17 Akyuerek; Altan Semiconductor module with multi-plane conductive path
EP1988569A3 (en) * 2007-04-26 2008-12-10 Siemens Aktiengesellschaft Method of manufacturing a terminal of a power semiconductor component and electronic component with a terminal manufactured in this manner
CN102276284A (en) * 2010-06-14 2011-12-14 Ixys半导体有限公司 Method for the manufacture of double-sided metallized ceramic substrates
EP2394975A1 (en) * 2010-06-14 2011-12-14 IXYS Semiconductor GmbH Method for producing metal-ceramic substrates metallised on both sides
US8876996B2 (en) 2010-06-14 2014-11-04 Ixys Semiconductor Gmbh Method for the manufacture of double-sided metalized ceramic substrates
CN102276284B (en) * 2010-06-14 2014-12-03 Ixys半导体有限公司 Method for the manufacture of double-sided metallized ceramic substrates
DE102018128097A1 (en) * 2018-11-09 2020-05-14 Infineon Technologies Ag SEMICONDUCTOR POWER MODULE AND METHOD FOR PRODUCING A SEMICONDUCTOR POWER MODULE
US11316292B2 (en) 2018-11-09 2022-04-26 Infineon Technologies Ag Semiconductor power module and method for producing a semiconductor power module
DE102018128097B4 (en) 2018-11-09 2022-08-11 Infineon Technologies Ag SEMICONDUCTOR POWER MODULE AND METHOD OF MANUFACTURING SEMICONDUCTOR POWER MODULE

Similar Documents

Publication Publication Date Title
DE69133497T2 (en) Leadframe for a semiconductor device and its manufacturing method
EP0627875B1 (en) Process for manufacturing metal-ceramic substrate
EP0221399B1 (en) Semiconductor power module
DE4131413C2 (en) Bonding process for semiconductor chips
DE69414753T2 (en) Assembly device and method for connecting miniaturized electronic components by means of bump connections
DE69113187T2 (en) Method of manufacturing an electronic thin film device.
DE19754874A1 (en) Converting substrate with edge contacts into ball grid array
DE10033977A1 (en) Intermediate coupling structure for mounting semiconductor chip on printed circuit board has conductor paths between contact pads and bonding pads on opposite sides of dielectric body
DE19509441C2 (en) Integrated hybrid power switching device
EP1008231A2 (en) Power module with a circuit arrangement comprising active semiconductor components and passive components, and method for producing same
EP1378008A2 (en) Power module
DE1956501C3 (en) Integrated circuit arrangement
EP0464232A1 (en) Solder connector and process for making an electrical circuit with this solder connector
DE3137570A1 (en) Method of directly bonding copper parts to oxide-ceramic substrates
DE69118308T2 (en) Method of making an electrical connection for an integrated circuit
EP0592938B1 (en) Process for mounting and contacting electronic components on an insulating support
EP0769214B1 (en) Process for producing an electrically conductive connection
DE10157362B4 (en) Power module and method for its production
DE3930858A1 (en) Modular electronic power circuit - with power components supported by metallised ceramics layer and enclosed by overlying insulation layer
DE3639604A1 (en) Method for producing solder-reinforced conductor tracks
DE2615758A1 (en) METHOD OF MANUFACTURING AN ARRANGEMENT FOR PACKING MONOLITHICALLY INTEGRATED CIRCUITS
DE3444699A1 (en) ELECTRICAL POWER COMPONENT
EP0867931A1 (en) Method of forming an oxide layer not wettable by solder
DE4109363C2 (en) Adhesive connection between an electronic component and a substrate and method for producing the adhesive connection
AT404207B (en) METHOD FOR PRODUCING ELECTRICAL CIRCUITS

Legal Events

Date Code Title Description
AF Is addition to no.

Ref country code: DE

Ref document number: 3036128

Format of ref document f/p: P

8110 Request for examination paragraph 44
8127 New person/name/address of the applicant

Owner name: BBC BROWN BOVERI AG, 6800 MANNHEIM, DE

8127 New person/name/address of the applicant

Owner name: ASEA BROWN BOVERI AG, 6800 MANNHEIM, DE

AF Is addition to no.

Ref country code: DE

Ref document number: 3036128

Format of ref document f/p: P

D2 Grant after examination
8362 Rights of main patent transferred to additional patent
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: AKYUEREK, ALTAN, DIPL.-ING., 8560 LAUF, DE

8327 Change in the person/name/address of the patent owner

Owner name: AKYUEREK, ALTAN, DIPL.-ING., WIEN, AT

8339 Ceased/non-payment of the annual fee
8370 Indication related to discontinuation of the patent is to be deleted
8339 Ceased/non-payment of the annual fee