DE3938643C2 - Method for reconstructing separated direct-current useful components of IF signals in a direct conversion receiver and receiver for carrying out the method - Google Patents

Description

The present invention relates to a method for reconstructing separated DC voltage components ZF signals in a direct conversion receiver according to the preamble of claim 1 or 2 and a receiver for performing the method according to the The preamble of claim 3, 4 or 5.  

This is received in a direct conversion recipient gene, angle-modulated RF input signal after a Input filter and an RF preamplifier have been supplied with a LO generated in a local oscillator (LO) Mixed signal. Because the LO signal is about the same Has frequency, such as the RF input signal, arises after mixing an intermediate frequency signal (IF), which in the low frequency range (NF). Mathematically speaking, the mix sometimes creates negative frequencies zen, but in practice not of the positive ones can be divorced. Likewise, can also be the same voltage components (DC useful components) are generated. To on full information is maintained at Direct- Conversion recipients necessary, ver two 90 ° to each other to form shifted IF signals. There are two mixing levels to which the RF signal and the LO signal are connected be placed, either at the one mixing stage applied RF or LO signal to the corresponding, phase the signal applied to the other mixer by 90 °  is moved. The one mixing stage generates a first IF Signal and the other mixer generates a second, to first IF signal 90 ° phase-shifted IF signal. Each the IF signals (I, Q) thus formed become one each for example analog, digital or mixed th low-pass filter, each with a following IF amplifier stage supplied and then in a demodulator de modulated. Because the direct conversion recipients frequency is in the LF range, the demodulator is included built-in circuitry. The filtered IF signals (I, Q) are in a preferred embodiment art, such as in the European patent specification 0 180 339 A2 indicated, in analog-digital converters in Digi Valley signals converted and digitally white for demodulation processed. Have digital signal processors (DSP) offered themselves as useful circuits. By the way it should be noted that it is also possible to use the entire Integrate ZF part. The required dynamic range, Power consumption and the price of the receiver determine here especially the technology to be used.

As already mentioned, the IF signals can be Conversion receivers DC components (DC usable parts) included. For the full information in the ZF part of the To process the receiver further, the IF amplifiers ker have a transmission range that down to zero Hertz reaches down. This is hardly feasible because in Amplifiers and mixer stages DC offset voltages occur which can be much larger than the two mentioned IF signals. This would override the IF stages and unacceptable distortions would result from demodulation  stanchions. This can be prevented, for example, by anyone that by AC coupling the IF stages, the same voltage components are separated from the ZF signals. As a result, the DC offset voltages but undesirably also the above-mentioned DC utility parts of the two IF signals, lost. In particular Situations can in turn cause distortions in the Demodulation arise. Although these distortions from lesser extent, they are still annoying.

In European patent specification 0 255 175 A2 that is Occurrence of these distortions mentioned and a demodula tion method for demodulating an angle-coded sig nales described in order to prevent such distortion inputs from the IF signals fed to the demodulator Control signal is formed, which as a correction signal the demodulated LF signal acts.  

The published patent application DE 33 46 725 A1 describes one Control circuit for keeping the DC component of a constant Signal. U.S. Patent 4,713,563 describes one Capacitor block used in a direct conversion receiver is used in the function of a high pass and thereby filters the IF signals. This reference is also included resulting DC voltage errors. The U.S. patent 4,475,088 describes, among other things, a phase error Detection network based on a phase shifter network works and thus corrects the phase. The European Registration 0 048 229 A2 describes correction and Control networks, the amplitudes and phase errors in one Correct the quadrature receiver. The networks divert both IF signals phase and amplitude errors from and calculate correction values using angular functions. The European application 0 074 858 A2 describes a recipient with the phase error between the two IF signals Multiplication of both signals and high pass filtering as well Amplitude errors due to digital comparison of samples of both channels can be corrected.

It is the object of the present invention Method for reconstructing the AC voltage Coupling (AC coupling) separated DC voltage Propose useful portions (DC) in the ZF signals, that without Action of control signals on the demodulator works.

Another task is to perform the Procedure to create suitable recipients.

The first task is according to that in the characterizing part of claim 1 or 2 listed features solved. Recipients according to the invention have means for reconstruction of the DC voltage components on how through the characteristics of claims 3, 4 or 5 are characterized.

The procedures disclosed in this document and the disclosed design variants of recipients for Carrying out the method are either characterized by this from that the individual process steps in one closed module are feasible without  any correction or control signals to others Receiver stages, especially the demodulator or NF part act, or that the individual Process steps in a signal processor, also known as Demodulator can work.  

The module includes the reconstruction tools mentioned. These can be a program-controlled, digital signal have processor or from individual analog and / or digital function levels.

Because the module is independent of other receiver levels works, it is versatile.

Amplitude fluctuations of the input signal (fading) have practically no effect, provided the fluctuations the same for the two IF signals shifted by 90 ° are. The reconstruction module is suitable for both Transmission lines via radio as well as via cable.

The invention is described below with reference to figures described in more detail, for example.

Show it:  

Fig. 1 is a block diagram of a direct conversion pfängers Em,

Fig. 2 is a block diagram of the means for reconstructing lost DC useful components in the IF signals,

Fig. 3 is a coordinate diagram for explaining the function of the reconstruction means, and

Fig. 4 is a block diagram of FIG. 2 with extended reconstruction means.

Fig. 1 shows the block diagram of a direct- conversion receiver in which the inventive Ver drive for reconstructing the IF part of the IF Sig nal (I, Q) is applied, for example, as a result of AC coupling in the lost DC useful components. An RF input signal is received with the antenna 1 , filtered in an input filter 2 and amplified in a preamplifier 3 . A Lokalos zillator 4 generates a local oscillator signal, hereinafter called the LO signal, which has approximately the same frequency as the RF input signal received by the antenna 1 . The LO signal is fed to two mixer stages 6 , 7 , a first mixer stage 6 directly and a two-th mixer stage 7 via a phase shift element 5 . The two mixing stages 6 , 7 also each receive the RF signal amplified by the preamplifier 3 . Each of the mixer stages 6 , 7 generates an IF signal at its output, which is due to the un dangerous equality of the frequency of the RF input signal and the LO signal in the low-frequency range. Each of the IF signals is low-pass filtered in a low-pass filter 8 , 9 and amplified in each case in an IF amplifier 10 , 11 . At the output of the first IF amplifier 10 there is an IF signal I and at the output of the second IF amplifier 11 there is an IF signal Q which is 90 ° out of phase with the signal I. The two IF signals I, Q can, as already explained in the introduction, each contain a direct voltage component, hereinafter referred to as DC useful component, in direct conversion receivers. As a result, for example, of high-pass filters or AC couplings, this useful DC component together with DC offset voltages in each of the IF signals I, Q has been removed. Due to the lack of a possibly available DC useful component, the IF signals contain I, Q errors, which leads to distortions during demodulation. The two IF signals I and Q with errors are fed to a means 12 for the reconstruction of lost DC useful components. With these reconstruction means, the method according to the invention is carried out on the two signals I and Q and the two corrected IF signals I _K and Q _K or the normalized corrected signals I _N and Q _{N are} generated, which are sent to a demodulator 13 for generating the LF -Signa les to be forwarded.

In FIG. 2 is a block diagram of a first embodiment of the reconstruction means 12 is shown, whose basis the inventive method for Recon struieren the separated DC-useful components to the IF Sig nal I and Q will be explained. The reconstruction member 12 has two inputs to which the IF signals I and Q are fed and two outputs to which the corrected IF signals I _K and Q _{K are present} with the reconstructed DC useful component. Each of the malfunctioning signals I, Q is fed to a subtractor 20 , 21 , to which correction signals E _I and E _{Q are also} applied and influence the signals I, Q so that at the output of said subtractors 20 , 21 each corrected IF signal I _K or Q _K are present. The correction signals E _I , E _Q can be interpreted as manipulated variables of a control loop, which come about as described below. The corrected output signals I _K , Q _K are fed to a first stage 22 , in which the square is formed from each of the signals, the two squared signals are added, and from the sum of one of the roots thereof corresponds to the signal present at the output R is formed. The further signal R is then fed to a high-pass filter 23 and connected to a multiplier 24 , 25 as a high-pass filtered signal EX. In a multiplier 24 , the corrected signal Q _{K is} multiplied by the high-pass filtered signal EX and supplied as the output variable EX _{Q to} a first integration stage 26 . The corrected signal I _K is multiplied in the other multiplier 25 with the high-pass filtered signal EX multi and supplied as a size EX _{I to} a second integration stage 27 . The output signal of the first integration stage 26 is the correction signal E _Q which is present as a manipulated variable at the subtractor 20 and the output signal from the second integration stage 27 is the correction signal E _I which is present as a manipulated variable at the other subtra here 21 .

In FIG. 3, attempts have been made to clearly show the previously described method in an XY representation. For better understanding, it is assumed in the following that the correction signals E _I , E _{Q are separated} from the subtracting stages 20 , 21 . The IF signals, which are 90 ° out of phase with each other, span a vector r. Purely sinusoidal or cosine-shaped IF signals I ', Q' form a vector r 'which rotates at a uniform rotational speed around the center Z' of the coordinate system. If the IF signals have a useful DC component after mixing, this is shown in the illustration by the fact that the rotational speed of the vector r 'is no longer constant. For example, an AC coupling removes DC components in the IF signals. This manifests itself in the graphic representation as a linear displacement A of the coordinate axis I 'to the coordinate axis I _K and as a linear displacement B of the coordinate axis Q' to the coordinate axis Q _K. The intersection Z of the two last-mentioned coordinates is the new center, around which the vector r rotates as a result of the separation of the DC useful components from the IF signals I, Q which are now subject to errors. The amount R of the vector r changes continuously. In the aforementioned stage 22 nothing is done other than continuously calculating the amount R of this latter vector. Exactly this happens according to the Pythagorean theorem, according to the formula given in step 22 in FIGS. 2 and 4. In the event that the Rekonstruktionsmit tel 12 include a program-controlled, digital signal processor, the root pulling is somewhat expensive. Appropriate approximation formulas for forming the amount of the circle radius, for example

are therefore used. The formula given above means that the instantaneous values of the amounts of the I _K and Q _K signals plus the larger of the instantaneous amounts of the two signals are continuously added and the sum is halved. The small error that arises does not noticeably affect the reconstruction. As already said, the amount R of the vector r changes continuously as soon as the origin of the coordinate system is shifted. This change in radius is used as a criterion for the size of the displacement. In order to obtain a signal for the change of R from the signal R, the latter is fed to a high-pass filter 23 which separates the constant part from the signal R and forms the high-pass filtered signal EX. If this latter signal is multiplied by I _K or Q _K and the product is integrated in the integration stages 26 and 27 , the two control signals E _I and E _Q arise which push the center Z towards the original center Z '.

FIG. 4 shows a block diagram with reconstruction means expanded compared to FIG. 2. So that the control circuit always works correctly largely independently of the input level, ie to increase the dynamic range, the corrected signals I _K , Q _{K are} normalized in this exemplary embodiment by each of these signals by the mean value R of the further signal R in a divider stage 30 , 31 is divided. At the output of each of the divider stages 30 , 31 , the standardized, corrected signals I _N and Q _{N are} pending. The mean value R of the further signal R is obtained by filtering the latter in a low-pass filter 28 . The further signal R and the low-pass filtered signal R are supplied to a subtractor 29 , which provides a standardized signal EX at its output. The low-pass filter 28 and the subtractor 29 together form a high-pass filter, so that the signal EX just mentioned corresponds in principle to the high-pass filtered signal EX mentioned in FIG. 2.

The inventive method can be carried out in differently designed receivers. A first preferred embodiment provides a receiver of the type described in the introduction, in which the reconstruction means 12 comprise a program-controlled, digital signal processor for carrying out the above-mentioned method steps. A second preferred embodiment provides for the reconstruction method to be carried out in the same program-controlled digital signal processor that has already been used as a demodulator. In a third preferred embodiment variant, the individual method steps for reconstructing the DC useful parts in the IF signals are carried out in analog and / or digital functional stages formed from discrete and / or integrated components.

Claims (5)

1. A method for reconstructing separated direct-current useful components of IF signals in a direct conversion receiver, in which a received angle-modulated RF signal is mixed with an LO signal generated in a local oscillator ( 4 ) in two mixing stages ( 6 , 7 ) and two IF signals shifted in phase by 90 ° are formed, each of the IF signals can contain a direct voltage component, which is separated in alternating voltage-coupled IF parts ( 8 , 9 , 10 , 11 ), whereby with IF signals (I, Q) with errors arise, characterized in that

• a) a correction signal (E _I , E _Q ) is supplied to each of the IF signals (I, Q), which has errors, and a corrected signal (I _K , Q _K ) is generated,
• b) each of the corrected signals (I _K , Q _K ) is squared, the signal squares are added and a further signal (R) corresponding to the root is formed from the sum, or the further signal (R) is approximated to the above steps is determined
• c) the further signal (R) is high-pass filtered and the high-pass filtered signal (EX) is multiplied by each of the corrected signals (I _K , Q _K ) and
• d) the product signal (EX _I , EX _Q ) is integrated to form the two correction signals (E _I , E _Q ).

2. Method for reconstructing separated direct-current useful components of IF signals in a direct conversion receiver, in which a received angle-modulated RF signal is mixed with an LO signal generated in a local oscillator ( 4 ) in two mixing stages ( 6 , 7 ) and two IF signals shifted in phase by 90 ° are formed, each of the IF signals can contain a DC voltage useful component, which is separated in each case in an AC-coupled IF part ( 8 , 9 , 10 , 11 ), which results in IF signals with errors (I, Q), characterized in that

• 1. a ') each of the IF signals with errors (I, Q) is supplied with a correction signal (E _I , E _Q ) and a corrected signal (I _K , Q _K ) is generated,
• 2. b ') each of the corrected signals (I _K , Q _K ) is squared, the signal squares are added and a further signal (R) corresponding to the root is formed from the sum or that the further signal (R) is approximated the above steps are determined
• 3. c ') the further signal (R) is low-pass filtered,
• 4. d ') each of the corrected signals (I _K , Q _K ) is divided by the low-pass filtered signal (R') to form a normalized corrected signal (I _N , Q _N ),
• 5. e ') the further signal (R) is high-pass filtered, the high-pass filtered signal (EX) is multiplied by each of the standardized corrected signals (I _N , Q _N ), and
• 6. f ') the product signal (EX _I , EX _Q ) is integrated to form the two correction signals (E _I , E _Q ).

3. Receiver for performing the method according to claim 1 or 2 with an RF part ( 1 , 2 , 3 ), a local oscillator ( 4 ), two mixing stages ( 6 , 7 ), an IF part ( 8 , 9 , 10 , 11 ) with two channels for filtering and amplifying the IF signals generated in the mixing stages ( 6 , 7 ) and a demodulator ( 13 ), the IF signals ( 8 , 9 , 10 , 11 ) present after the IF part ( 8 , 9 , 10 , 11 ) I, Q) as a result of the DC voltage component separated by AC voltage coupling, characterized in that the reconstruction means ( 12 ) in the form of a program-controlled digital signal processor for carrying out the individual method steps (a, b, c, d) or ( a ', b', c ', d', e ', f') for generating corrected IF signals (I _K , Q _K ) or standardized corrected IF signals (I _N , Q _N ) are present. 4. Receiver for performing the method according to claim 1 or 2 with an RF part ( 1 , 2 , 3 ), a local oscillator ( 4 ), two mixing stages ( 6 , 7 ), an IF part ( 8 , 9 , 10 , 11 ) with two channels for filtering and amplifying the IF signals generated in the mixing stages and a demodulator ( 13 ), the IF signals (I, Q) present after the IF part ( 8 , 9 , 10 , 11 ) as a result of the DC voltage component separated by AC voltage coupling are characterized by errors, characterized in that the demodulator ( 13 ) is designed as a program-controlled digital signal processor and also for carrying out the individual method steps (a, b, c, d) or (a ', b ', c', d ', e', f ') is intended for generating corrected IF signals (I _K , Q _K ) or standardized corrected IF signals (I _N , Q _N ). 5. Receiver for performing the method according to claim 1 or 2 with an RF part ( 1 , 2 , 3 ), a local oscillator ( 4 ), two mixing stages ( 6 , 7 ), an IF part ( 8 , 9 , 10 , 11 ) with two channels for filtering and amplifying the IF signals generated in the mixing stages and a demodulator ( 13 ), the IF signals (I, Q) present after the IF part as a result of the DC voltage useful component separated by AC coupling are characterized by errors, characterized in that the reconstruction means ( 12 ) for performing the individual method steps (a, b, c, d) or (a ', b', c ', d', e ', f') for forming corrected IF signals (I _K , Q _K ) or normalized corrected IF signals (I _N , Q _N ) comprise the following discrete and / or integrated components formed analog and / or digital function stages:

• a) two stages ( 20 , 21 ) for receiving the existing IF signals (I, Q) and correction signals (E _I , E _Q ) and providing the corrected IF signals (I _K, Q _K ),
• b) a stage ( 22 ) for receiving both corrected IF signals (I _K , Q _K ) and for providing the further signal (R),
• c) a stage ( 23 , 24 , 25 ) for high-pass filtering the further signal (R) and for multiplying the high-pass filtered signal (EX) by the corrected signals (I _K , Q _K ),
• d) two stages ( 26 , 27 ) for integrating the respective product signals (EX _Q , EX _I ) into the respective correction signals;

or

• 1. a ') two stages ( 20 , 21 ) for receiving the existing IF signals (I, Q) and correction signals (E _I , E _Q ) and providing the corrected IF signals (I _K , Q _K ),
• 2. b ') a stage ( 22 ) for receiving both corrected IF signals (I _K , Q _K ) and for providing the further signal (R),
• 3. c ') a stage ( 28 ) for low-pass filtering the further signal,
• 4. d ') two stages for dividing the respective corrected signals (I _K , Q _K ) by the low-pass filtered signal (R') and for forming the standardized corrected signals (I _N , Q _N ),
• 5. e ') a stage ( 29 , 24 , 25 ) which, in conjunction with the stage for low-pass filtering ( 28 ), high-pass filters the further signal (R) and multiplies it with each of the standardized corrected signals (I _N , Q _N ),
• 6. f ') two stages ( 26 , 27 ) for integrating the respective product signals (EX _Q , EX _I ) into the respective correction signals.