DE3888133T2 - Datenmustersynchronisiereinrichtung. - Google Patents

Datenmustersynchronisiereinrichtung.

Info

Publication number
DE3888133T2
DE3888133T2 DE3888133T DE3888133T DE3888133T2 DE 3888133 T2 DE3888133 T2 DE 3888133T2 DE 3888133 T DE3888133 T DE 3888133T DE 3888133 T DE3888133 T DE 3888133T DE 3888133 T2 DE3888133 T2 DE 3888133T2
Authority
DE
Germany
Prior art keywords
data pattern
pattern synchronizer
synchronizer
data
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3888133T
Other languages
English (en)
Other versions
DE3888133D1 (de
Inventor
Mishio Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of DE3888133D1 publication Critical patent/DE3888133D1/de
Application granted granted Critical
Publication of DE3888133T2 publication Critical patent/DE3888133T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/04Speed or phase control by synchronisation signals
    • H04L7/041Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042Detectors therefor, e.g. correlators, state machines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
DE3888133T 1987-12-21 1988-12-13 Datenmustersynchronisiereinrichtung. Expired - Fee Related DE3888133T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62324831A JPH01165239A (ja) 1987-12-21 1987-12-21 データパターン同期装置

Publications (2)

Publication Number Publication Date
DE3888133D1 DE3888133D1 (de) 1994-04-07
DE3888133T2 true DE3888133T2 (de) 1994-07-14

Family

ID=18170168

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3888133T Expired - Fee Related DE3888133T2 (de) 1987-12-21 1988-12-13 Datenmustersynchronisiereinrichtung.

Country Status (4)

Country Link
US (1) US4878233A (de)
EP (1) EP0321837B1 (de)
JP (1) JPH01165239A (de)
DE (1) DE3888133T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0440125A (ja) * 1990-06-06 1992-02-10 Advantest Corp パターン同期回路
JP2513017Y2 (ja) * 1990-07-30 1996-10-02 株式会社アドバンテスト 高周波多極コネクタ
JPH04103240A (ja) * 1990-08-22 1992-04-06 Advantest Corp パターン同期回路
DE4111176C1 (de) * 1991-04-06 1992-09-17 Wandel & Goltermann Gmbh & Co, 7412 Eningen, De
US5430746A (en) * 1992-06-09 1995-07-04 Wandel & Goltermann Gmbh & Co. Elektronische Messtechnik Method of and circuitry for detecting synchronism failure of two word sequences
US6715094B2 (en) * 2000-12-20 2004-03-30 Intel Corporation Mult-mode I/O interface for synchronizing selected control patterns into control clock domain to obtain interface control signals to be transmitted to I/O buffers
GB0525234D0 (en) * 2005-12-12 2006-01-18 Qinetiq Ltd Correlation apparatus
US20170132055A1 (en) * 2015-11-11 2017-05-11 Cisco Technology, Inc., A Corporation Of California Determining Physical Layer Error Signatures of a Communications Link
EP3297205A1 (de) * 2016-09-16 2018-03-21 Universiteit Gent Sequenzausrichter zur datensynchronisierung
US10649849B2 (en) 2017-07-14 2020-05-12 Samsung Electronics Co., Ltd. Memory device including detection clock pattern generator for generating detection clock output signal including random data pattern

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4171513A (en) * 1966-09-06 1979-10-16 Sanders Associates, Inc. Secure communications system
US3648237A (en) * 1969-02-28 1972-03-07 Ibm Apparatus and method for obtaining synchronization of a maximum length pseudorandom sequence
GB1572622A (en) * 1977-03-29 1980-07-30 Secr Defence Code synchronising apparatus
DE2735203C2 (de) * 1977-08-04 1979-07-12 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren und Anordnung zur Bitfehlerquotenmessung in einem Zeitmultiplexsystem
DE3230027A1 (de) * 1982-08-12 1984-02-16 Siemens Ag Synchronisieranordnung
US4590601A (en) * 1984-12-24 1986-05-20 Gte Communication Systems Corporation Pseudo random framing detector circuit
US4791653A (en) * 1987-08-25 1988-12-13 Hewlett-Packard Company Pseudorandom word sequence synchronizer

Also Published As

Publication number Publication date
US4878233A (en) 1989-10-31
JPH01165239A (ja) 1989-06-29
DE3888133D1 (de) 1994-04-07
EP0321837A2 (de) 1989-06-28
EP0321837B1 (de) 1994-03-02
EP0321837A3 (en) 1990-09-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee