DE3877877D1 - Veraenderung der grenzschichtfelder zwischen isolatoren und halbleitern. - Google Patents

Veraenderung der grenzschichtfelder zwischen isolatoren und halbleitern.

Info

Publication number
DE3877877D1
DE3877877D1 DE8888115112T DE3877877T DE3877877D1 DE 3877877 D1 DE3877877 D1 DE 3877877D1 DE 8888115112 T DE8888115112 T DE 8888115112T DE 3877877 T DE3877877 T DE 3877877T DE 3877877 D1 DE3877877 D1 DE 3877877D1
Authority
DE
Germany
Prior art keywords
insulators
semiconductors
change
border layer
layer fields
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888115112T
Other languages
English (en)
Other versions
DE3877877T2 (de
Inventor
Sheldon Aronowitz
Kranti Anand
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Application granted granted Critical
Publication of DE3877877D1 publication Critical patent/DE3877877D1/de
Publication of DE3877877T2 publication Critical patent/DE3877877T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28211—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/3115—Doping the insulating layers
    • H01L21/31155—Doping the insulating layers by ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/003—Anneal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/024—Defect control-gettering and annealing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/06—Gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)
DE8888115112T 1987-09-21 1988-09-15 Veraenderung der grenzschichtfelder zwischen isolatoren und halbleitern. Expired - Fee Related DE3877877T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US9904887A 1987-09-21 1987-09-21

Publications (2)

Publication Number Publication Date
DE3877877D1 true DE3877877D1 (de) 1993-03-11
DE3877877T2 DE3877877T2 (de) 1993-05-19

Family

ID=22272308

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888115112T Expired - Fee Related DE3877877T2 (de) 1987-09-21 1988-09-15 Veraenderung der grenzschichtfelder zwischen isolatoren und halbleitern.

Country Status (5)

Country Link
US (1) US6117749A (de)
EP (1) EP0308814B1 (de)
JP (1) JPH01165130A (de)
CA (1) CA1315420C (de)
DE (1) DE3877877T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03190230A (ja) * 1989-12-20 1991-08-20 Fujitsu Ltd 半導体装置およびその製造方法
DE4316855C1 (de) * 1993-05-19 1994-09-15 Siemens Ag Mikroelektronische Schaltungsstruktur und Verfahren zu deren Herstellung
US5387530A (en) * 1993-06-29 1995-02-07 Digital Equipment Corporation Threshold optimization for soi transistors through use of negative charge in the gate oxide
US5407850A (en) * 1993-06-29 1995-04-18 Digital Equipment Corporation SOI transistor threshold optimization by use of gate oxide having positive charge
JP4397491B2 (ja) * 1999-11-30 2010-01-13 財団法人国際科学振興財団 １１１面方位を表面に有するシリコンを用いた半導体装置およびその形成方法
FR2881419B1 (fr) * 2005-01-28 2007-11-09 Centre Nat Rech Scient Procede de fabrication d'un materiau a base d'oxyde de silicium et a faible constante dielectrique
JP2017055015A (ja) * 2015-09-11 2017-03-16 株式会社東芝 半導体装置

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1444538A1 (de) * 1963-08-12 1968-12-12 Siemens Ag Verfahren zum Herstellen von Halbleiterbauelementen
US3310442A (en) * 1964-10-16 1967-03-21 Siemens Ag Method of producing semiconductors by diffusion
US3328210A (en) * 1964-10-26 1967-06-27 North American Aviation Inc Method of treating semiconductor device by ionic bombardment
DE1544281C3 (de) * 1966-03-04 1975-04-03 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Dotieren von Silicium- Halbleitermaterial
NL6807368A (de) * 1967-07-05 1969-01-07
US3664895A (en) * 1969-06-13 1972-05-23 Gen Electric Method of forming a camera tube diode array target by masking and diffusion
FR2191272A1 (de) * 1972-06-27 1974-02-01 Ibm France
US4007294A (en) * 1974-06-06 1977-02-08 Rca Corporation Method of treating a layer of silicon dioxide
US4048350A (en) * 1975-09-19 1977-09-13 International Business Machines Corporation Semiconductor device having reduced surface leakage and methods of manufacture
GB1596184A (en) * 1976-11-27 1981-08-19 Fujitsu Ltd Method of manufacturing semiconductor devices
GB1566072A (en) * 1977-03-28 1980-04-30 Tokyo Shibaura Electric Co Semiconductor device
FR2395606A1 (fr) * 1978-02-08 1979-01-19 Ibm Structure de capacite amelioree a champ eleve utilisant une region de piegeage de porteurs
GB2028582A (en) * 1978-08-17 1980-03-05 Plessey Co Ltd Field effect structure
JPS56125848A (en) * 1980-03-07 1981-10-02 Chiyou Lsi Gijutsu Kenkyu Kumiai Surface treatment of semiconductor
JPH0783031B2 (ja) * 1984-03-08 1995-09-06 敏和 須田 ▲ｉｉ▼−▲ｖ▼族化合物半導体の薄膜又は結晶の製造方法
US4622082A (en) * 1984-06-25 1986-11-11 Monsanto Company Conditioned semiconductor substrates
US4710478A (en) * 1985-05-20 1987-12-01 United States Of America As Represented By The Secretary Of The Navy Method for making germanium/gallium arsenide high mobility complementary logic transistors
EP0213972A1 (de) * 1985-08-30 1987-03-11 SILICONIX Incorporated Verfahren zum Ändern der Schwellspannung eines DMOS Transistors

Also Published As

Publication number Publication date
EP0308814B1 (de) 1993-01-27
JPH01165130A (ja) 1989-06-29
CA1315420C (en) 1993-03-30
US6117749A (en) 2000-09-12
EP0308814A2 (de) 1989-03-29
DE3877877T2 (de) 1993-05-19
EP0308814A3 (en) 1989-04-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee