DE3854314D1 - Schaltung zur Umsetzung eines m bit Kodes in einen n bit Kode. - Google Patents

Schaltung zur Umsetzung eines m bit Kodes in einen n bit Kode.

Info

Publication number
DE3854314D1
DE3854314D1 DE3854314T DE3854314T DE3854314D1 DE 3854314 D1 DE3854314 D1 DE 3854314D1 DE 3854314 T DE3854314 T DE 3854314T DE 3854314 T DE3854314 T DE 3854314T DE 3854314 D1 DE3854314 D1 DE 3854314D1
Authority
DE
Germany
Prior art keywords
bit code
converting
circuit
bit
code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3854314T
Other languages
English (en)
Other versions
DE3854314T2 (de
Inventor
Yoshiyuki Hongo
Kazuo Takatsu
Masanori Otsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE3854314D1 publication Critical patent/DE3854314D1/de
Application granted granted Critical
Publication of DE3854314T2 publication Critical patent/DE3854314T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
    • H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/14—Conversion to or from non-weighted codes
    • H03M7/20—Conversion to or from n-out-of-m codes
DE19883854314 1987-05-15 1988-05-13 Schaltung zur Umsetzung eines m bit Kodes in einen n bit Kode. Expired - Fee Related DE3854314T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11982187A JPS63284930A (ja) 1987-05-15 1987-05-15 ｍＢｎＢ符号変換回路

Publications (2)

Publication Number Publication Date
DE3854314D1 true DE3854314D1 (de) 1995-09-21
DE3854314T2 DE3854314T2 (de) 1996-02-22

Family

ID=14771083

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19883854314 Expired - Fee Related DE3854314T2 (de) 1987-05-15 1988-05-13 Schaltung zur Umsetzung eines m bit Kodes in einen n bit Kode.

Country Status (5)

Country Link
EP (1) EP0294614B1 (de)
JP (1) JPS63284930A (de)
AU (1) AU589066B2 (de)
DE (1) DE3854314T2 (de)
NZ (1) NZ224455A (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2856653B1 (de) * 2012-05-25 2017-02-22 Silicon Line GmbH Vorrichtung und verfahren für die 5b/6b-kodierung

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8402445A (nl) * 1984-01-20 1985-08-16 Philips Nv Werkwijze voor het coderen van n-bits informatiewoorden naar m-bits codewoorden, inrichting voor het uitvoeren van die werkwijze, werkwijze voor het decoderen van m-bits codewoorden naar n-bits informatiewoorden en inrichting voor het uitvoeren van die werkwijze.
DE3412986A1 (de) * 1984-04-06 1985-10-24 Standard Elektrik Lorenz Ag, 7000 Stuttgart Digitales nachrichtenuebertragungssystem mit integrierter uebertragung einer zusatzinformation mit geringer bitfolgefrequenz
JPS6158326A (ja) * 1984-08-30 1986-03-25 Fujitsu Ltd ｍＢｎＢ符号変換回路
US4707681A (en) * 1986-04-24 1987-11-17 International Business Machines Corporation Method and apparatus for implementing optimum PRML codes

Also Published As

Publication number Publication date
NZ224455A (en) 1989-09-27
EP0294614A3 (de) 1991-09-18
EP0294614B1 (de) 1995-08-16
EP0294614A2 (de) 1988-12-14
AU1612088A (en) 1988-11-17
JPH0381334B2 (de) 1991-12-27
DE3854314T2 (de) 1996-02-22
AU589066B2 (en) 1989-09-28
JPS63284930A (ja) 1988-11-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee