DE3851210D1 - Datenbussteuerung von ROM-Einheiten in einer Informationsverarbeitungsanordnung. - Google Patents

Datenbussteuerung von ROM-Einheiten in einer Informationsverarbeitungsanordnung.

Info

Publication number
DE3851210D1
DE3851210D1 DE3851210T DE3851210T DE3851210D1 DE 3851210 D1 DE3851210 D1 DE 3851210D1 DE 3851210 T DE3851210 T DE 3851210T DE 3851210 T DE3851210 T DE 3851210T DE 3851210 D1 DE3851210 D1 DE 3851210D1
Authority
DE
Germany
Prior art keywords
information processing
data bus
bus control
processing arrangement
rom units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3851210T
Other languages
English (en)
Other versions
DE3851210T2 (de
Inventor
Gregory Kenton Goodhue
William James Price
Ronald Llewllyn Treatway
Brian Marr Willis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3851210D1 publication Critical patent/DE3851210D1/de
Publication of DE3851210T2 publication Critical patent/DE3851210T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Memory System (AREA)
DE3851210T 1987-12-18 1988-12-13 Datenbussteuerung von ROM-Einheiten in einer Informationsverarbeitungsanordnung. Expired - Fee Related DE3851210T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/136,249 US4905137A (en) 1987-12-18 1987-12-18 Data bus control of ROM units in information processing system

Publications (2)

Publication Number Publication Date
DE3851210D1 true DE3851210D1 (de) 1994-09-29
DE3851210T2 DE3851210T2 (de) 1995-03-02

Family

ID=22472017

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3851210T Expired - Fee Related DE3851210T2 (de) 1987-12-18 1988-12-13 Datenbussteuerung von ROM-Einheiten in einer Informationsverarbeitungsanordnung.

Country Status (4)

Country Link
US (1) US4905137A (de)
EP (1) EP0321044B1 (de)
JP (1) JPH01281544A (de)
DE (1) DE3851210T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5243701A (en) * 1987-09-17 1993-09-07 Mitsubishi Denki Kabushiki Kaisha Method of and system for processing data having bit length variable with modes of operation
DE602004006700D1 (de) * 2003-12-12 2007-07-12 St Microelectronics Sa Serieller Speicher mit Mitteln zum Schutz eines erweiterten Speicherfeldes während einer Schreiboperation

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4158227A (en) * 1977-10-12 1979-06-12 Bunker Ramo Corporation Paged memory mapping with elimination of recurrent decoding
JPS5525106A (en) * 1978-08-09 1980-02-22 Toshiba Corp Main memory control system
US4315308A (en) * 1978-12-21 1982-02-09 Intel Corporation Interface between a microprocessor chip and peripheral subsystems
US4325120A (en) * 1978-12-21 1982-04-13 Intel Corporation Data processing system
US4495571A (en) * 1979-01-31 1985-01-22 Honeywell Information Systems Inc. Data processing system having synchronous bus wait/retry cycle
US4306298A (en) * 1979-10-09 1981-12-15 Texas Instruments Incorporated Memory system for microprocessor with multiplexed address/data bus
JPS56153574A (en) * 1980-04-28 1981-11-27 Ricoh Co Ltd Memory device
DE3016952C2 (de) * 1980-05-02 1984-04-26 Standard Elektrik Lorenz Ag, 7000 Stuttgart Schaltungsanordnung zum Erweitern des Adressbereichs eines rechnergesteuerten Vermittlungssystems
JPS578980A (en) * 1980-06-18 1982-01-18 Hitachi Ltd Memory device
US4381542A (en) * 1980-10-20 1983-04-26 Digital Equipment Corporation System for interrupt arbitration
GB2092341B (en) * 1981-02-02 1984-09-12 Picker Int Ltd Computer peripheral selection
US4407016A (en) * 1981-02-18 1983-09-27 Intel Corporation Microprocessor providing an interface between a peripheral subsystem and an object-oriented data processor
US4368515A (en) * 1981-05-07 1983-01-11 Atari, Inc. Bank switchable memory system
JPS59188890A (ja) * 1983-04-11 1984-10-26 Hitachi Ltd 半導体集積回路におけるコントロ−ル回路
US4675808A (en) * 1983-08-08 1987-06-23 American Telephone And Telegraph Company At&T Bell Laboratories Multiplexed-address interface for addressing memories of various sizes
JPS60205644A (ja) * 1984-03-29 1985-10-17 Ascii Corp メモリアドレス拡張方式
JPS62250581A (ja) * 1986-04-23 1987-10-31 Hitachi Ltd 半導体集積回路装置

Also Published As

Publication number Publication date
EP0321044A2 (de) 1989-06-21
EP0321044A3 (en) 1990-08-08
DE3851210T2 (de) 1995-03-02
EP0321044B1 (de) 1994-08-24
JPH01281544A (ja) 1989-11-13
US4905137A (en) 1990-02-27

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: KONINKLIJKE PHILIPS ELECTRONICS N.V., EINDHOVEN, N

8339 Ceased/non-payment of the annual fee