DE3850903T2 - Steuerungssystem mit zwei Mikroprozessoren. - Google Patents

Steuerungssystem mit zwei Mikroprozessoren.

Info

Publication number
DE3850903T2
DE3850903T2 DE3850903T DE3850903T DE3850903T2 DE 3850903 T2 DE3850903 T2 DE 3850903T2 DE 3850903 T DE3850903 T DE 3850903T DE 3850903 T DE3850903 T DE 3850903T DE 3850903 T2 DE3850903 T2 DE 3850903T2
Authority
DE
Germany
Prior art keywords
microprocessors
control system
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3850903T
Other languages
English (en)
Other versions
DE3850903D1 (de
Inventor
Thomas O Holtey
Thomas L Murray
Wayne A Perzan
Scott W Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Inc
Original Assignee
Bull HN Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull HN Information Systems Inc filed Critical Bull HN Information Systems Inc
Application granted granted Critical
Publication of DE3850903D1 publication Critical patent/DE3850903D1/de
Publication of DE3850903T2 publication Critical patent/DE3850903T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Communication Control (AREA)
  • Multi Processors (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Computer And Data Communications (AREA)
  • Microcomputers (AREA)
  • Hardware Redundancy (AREA)
DE3850903T 1987-03-31 1988-03-24 Steuerungssystem mit zwei Mikroprozessoren. Expired - Fee Related DE3850903T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/032,902 US4979104A (en) 1987-03-31 1987-03-31 Dual microprocessor control system

Publications (2)

Publication Number Publication Date
DE3850903D1 DE3850903D1 (de) 1994-09-08
DE3850903T2 true DE3850903T2 (de) 1995-04-06

Family

ID=21867476

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3850903T Expired - Fee Related DE3850903T2 (de) 1987-03-31 1988-03-24 Steuerungssystem mit zwei Mikroprozessoren.

Country Status (17)

Country Link
US (1) US4979104A (de)
EP (1) EP0289771B1 (de)
JP (1) JPS6478359A (de)
KR (1) KR930003402B1 (de)
CN (1) CN1020810C (de)
AU (1) AU608582B2 (de)
BR (1) BR8801411A (de)
CA (1) CA1301945C (de)
DE (1) DE3850903T2 (de)
DK (1) DK181788A (de)
FI (1) FI881449A (de)
IL (1) IL85863A (de)
MX (1) MX173004B (de)
NO (1) NO881409L (de)
NZ (1) NZ223881A (de)
PH (1) PH25694A (de)
YU (1) YU64888A (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5155857A (en) * 1987-05-29 1992-10-13 Hitachi, Ltd. Communication processing system in which communication by terminals is controlled according to a terminal management table
US5182800A (en) * 1990-11-16 1993-01-26 International Business Machines Corporation Direct memory access controller with adaptive pipelining and bus control features
CN1081367C (zh) * 1995-11-23 2002-03-20 联华电子股份有限公司 限定使用次数的集成电路
US8145869B2 (en) 2007-01-12 2012-03-27 Broadbus Technologies, Inc. Data access and multi-chip controller

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3651482A (en) * 1968-04-03 1972-03-21 Honeywell Inc Interlocking data subprocessors
US3670306A (en) * 1971-03-01 1972-06-13 Honeywell Inf Systems Process for data communication between data processing systems
US4318174A (en) * 1975-12-04 1982-03-02 Tokyo Shibaura Electric Co., Ltd. Multi-processor system employing job-swapping between different priority processors
US4164787A (en) * 1977-11-09 1979-08-14 Bell Telephone Laboratories, Incorporated Multiple microprocessor intercommunication arrangement
JPS564854A (en) * 1979-06-22 1981-01-19 Fanuc Ltd Control system for plural microprocessors
US4425616A (en) * 1979-11-06 1984-01-10 Frederick Electronic Corporation High-speed time share processor
US4488231A (en) * 1980-09-29 1984-12-11 Honeywell Information Systems Inc. Communication multiplexer having dual microprocessors
US4482982A (en) * 1980-09-29 1984-11-13 Honeywell Information Systems Inc. Communication multiplexer sharing a free running timer among multiple communication lines
JPS59202561A (ja) * 1983-05-04 1984-11-16 Nec Corp マルチマイクロプロセツサシステムにおけるメモリアクセス方式
DE3335357A1 (de) * 1983-09-29 1985-04-11 Siemens AG, 1000 Berlin und 8000 München Systemarchitektur fuer ein signalprozessorsystem zur funktionalen integration einer automatischen spracheingabe/-ausgabe
JPS60247763A (ja) * 1984-05-24 1985-12-07 Matsushita Electric Ind Co Ltd ブロツク単位並行処理メモリ

Also Published As

Publication number Publication date
FI881449A0 (fi) 1988-03-28
AU608582B2 (en) 1991-04-11
DK181788D0 (da) 1988-03-30
NO881409L (no) 1988-10-03
PH25694A (en) 1991-09-04
DK181788A (da) 1989-02-07
EP0289771A2 (de) 1988-11-09
CA1301945C (en) 1992-05-26
YU64888A (en) 1991-01-28
IL85863A (en) 1991-07-18
FI881449A (fi) 1988-10-01
AU1380188A (en) 1988-09-29
KR930003402B1 (ko) 1993-04-26
JPS6478359A (en) 1989-03-23
KR880011653A (ko) 1988-10-29
CN88102351A (zh) 1988-11-02
JPH0583938B2 (de) 1993-11-30
NZ223881A (en) 1990-02-26
EP0289771A3 (en) 1990-07-11
IL85863A0 (en) 1988-09-30
CN1020810C (zh) 1993-05-19
EP0289771B1 (de) 1994-08-03
US4979104A (en) 1990-12-18
NO881409D0 (no) 1988-03-29
DE3850903D1 (de) 1994-09-08
BR8801411A (pt) 1988-11-01
MX173004B (es) 1994-01-28

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: BULL HN INFORMATION SYSTEMS INC., BILLERICA, MASS.

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee