DE3788346T2 - E/a-system zur abladung von betriebssystemfunktionen. - Google Patents
E/a-system zur abladung von betriebssystemfunktionen.Info
- Publication number
- DE3788346T2 DE3788346T2 DE3788346T DE3788346T DE3788346T2 DE 3788346 T2 DE3788346 T2 DE 3788346T2 DE 3788346 T DE3788346 T DE 3788346T DE 3788346 T DE3788346 T DE 3788346T DE 3788346 T2 DE3788346 T2 DE 3788346T2
- Authority
- DE
- Germany
- Prior art keywords
- input
- processor
- output
- memory
- task control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
- G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US92656786A | 1986-11-04 | 1986-11-04 | |
| US92658886A | 1986-11-04 | 1986-11-04 | |
| US92673886A | 1986-11-04 | 1986-11-04 | |
| US06/926,568 US5764922A (en) | 1986-11-04 | 1986-11-04 | I/O system for off-loading operating system functions |
| PCT/US1987/002812 WO1988003682A2 (en) | 1986-11-04 | 1987-10-29 | I/o system for off-loading operating system functions |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE3788346D1 DE3788346D1 (de) | 1994-01-13 |
| DE3788346T2 true DE3788346T2 (de) | 1994-06-23 |
Family
ID=27506008
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE3788346T Expired - Fee Related DE3788346T2 (de) | 1986-11-04 | 1987-10-29 | E/a-system zur abladung von betriebssystemfunktionen. |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0290533B1 (enExample) |
| JP (1) | JPS63503336A (enExample) |
| CA (1) | CA1306311C (enExample) |
| DE (1) | DE3788346T2 (enExample) |
-
1987
- 1987-10-29 EP EP87907564A patent/EP0290533B1/en not_active Expired - Lifetime
- 1987-10-29 JP JP62507035A patent/JPS63503336A/ja active Granted
- 1987-10-29 DE DE3788346T patent/DE3788346T2/de not_active Expired - Fee Related
- 1987-11-03 CA CA000550970A patent/CA1306311C/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| WO1988003682A1 (en) | 1988-05-19 |
| EP0290533A1 (en) | 1988-11-17 |
| DE3788346D1 (de) | 1994-01-13 |
| CA1306311C (en) | 1992-08-11 |
| JPH0519179B2 (enExample) | 1993-03-16 |
| EP0290533B1 (en) | 1993-12-01 |
| JPS63503336A (ja) | 1988-12-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE69127101T2 (de) | System für verteilte mehrfachrechnerkommunikation | |
| DE69724846T2 (de) | Mehrweg-Ein/Ausgabespeichersysteme mit Mehrweg-Ein/Ausgabeanforderungsmechanismus | |
| DE69024753T2 (de) | Tragbarer, Ressourcen teilender Datei-Server, der gemeinsame Routines benutzt | |
| DE69027515T2 (de) | Vorrichtung für Prioritätsarbitrierungskonditionierung bei gepufferter Direktspeicheradressierung | |
| DE69419680T2 (de) | Skalierbare Unterbrechungsstruktur für ein Simultanverarbeitungssystem | |
| DE69227939T2 (de) | Gerätetreibersystem mit einer Schnittstelle zu einem generischen Betriebsystem | |
| DE3114961C2 (enExample) | ||
| DE60015395T2 (de) | Speicher, der zwischen verarbeitenden threads geteilt ist | |
| DE69728212T2 (de) | Speichersteuerung und diese verwendendes Rechnersystem | |
| DE3587439T2 (de) | Gemeinsam benutzter Mehrprozessor-Pipeline-Cachespeicher. | |
| DE3588009T2 (de) | Vorrichtung und Verfahren zum Rekonfigurieren eines Speichers in einer Datenverarbeitungsanordnung. | |
| DE69721209T2 (de) | Pufferreservierungsverfahren für ein Busbrückensystem | |
| DE69614291T2 (de) | (n+i) Ein/Ausgabekanälesteuerung, mit (n) Datenverwaltern, in einer homogenen Software-Programmierbetriebsumgebung | |
| DE10085374B4 (de) | Systemmanagementspeicher für die Systemmanagement-Interrupt-Behandler wird in die Speichersteuereinrichtung integriert, unabhängig vom BIOS und Betriebssystem | |
| DE2411963C3 (de) | Elektronische Datenverarbeitungsanlage mit einer Prioritätssteuerschaltung mit änderbaren Steuerblöcken | |
| DE69733374T2 (de) | Speichersteuerungsvorrichtung und -system | |
| DE69915243T2 (de) | Speicherplattenanordnung-Steuerungsvorrichtung | |
| DE3685876T2 (de) | Meister-sklave-mikroprozessorsystem mit einem virtuellen speicher. | |
| EP0006164B1 (de) | Multiprozessorsystem mit gemeinsam benutzbaren Speichern | |
| DE2902465A1 (de) | Datenverarbeitungsanordnung | |
| DE69219848T2 (de) | Verfahren zur Behandlung von Datenübertragungen in einen Computersystem mit einem Zweibusbau | |
| DE69622832T2 (de) | Vorrichtung und verfahren für kooperative unterbrechungen in einer preemptiven prozessablauffolgeplanungsumgebung | |
| DE2243956A1 (de) | Speicherprogrammierte datenverarbeitungsanlage | |
| DE60026068T2 (de) | System für externe transaktionen mit dynamischen prioritäten | |
| DE69330548T2 (de) | Datentransfereinheit zur Benutzung in parallelen Verarbeitungssystemen |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee |