DE3786073D1 - Verfahren zur herstellung eines bipolaren bauelementes. - Google Patents

Verfahren zur herstellung eines bipolaren bauelementes.

Info

Publication number
DE3786073D1
DE3786073D1 DE8787904905T DE3786073T DE3786073D1 DE 3786073 D1 DE3786073 D1 DE 3786073D1 DE 8787904905 T DE8787904905 T DE 8787904905T DE 3786073 T DE3786073 T DE 3786073T DE 3786073 D1 DE3786073 D1 DE 3786073D1
Authority
DE
Germany
Prior art keywords
producing
bipolar component
bipolar
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787904905T
Other languages
English (en)
Other versions
DE3786073T2 (de
Inventor
Martin Wilson
Peter Hunt
Peter Childs
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microchip Technology Caldicot Ltd
Original Assignee
Plessey Semiconductors Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Plessey Semiconductors Ltd filed Critical Plessey Semiconductors Ltd
Publication of DE3786073D1 publication Critical patent/DE3786073D1/de
Application granted granted Critical
Publication of DE3786073T2 publication Critical patent/DE3786073T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32105—Oxidation of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
DE8787904905T 1986-07-25 1987-07-25 Verfahren zur herstellung eines bipolaren bauelementes. Expired - Fee Related DE3786073T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8618207A GB2193034B (en) 1986-07-25 1986-07-25 Process for the production of bipolar devices
PCT/GB1987/000529 WO1988001101A1 (en) 1986-07-25 1987-07-25 Process for the production of bipolar devices

Publications (2)

Publication Number Publication Date
DE3786073D1 true DE3786073D1 (de) 1993-07-08
DE3786073T2 DE3786073T2 (de) 1993-09-16

Family

ID=10601694

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787904905T Expired - Fee Related DE3786073T2 (de) 1986-07-25 1987-07-25 Verfahren zur herstellung eines bipolaren bauelementes.

Country Status (5)

Country Link
EP (1) EP0277166B1 (de)
JP (1) JPH01500473A (de)
DE (1) DE3786073T2 (de)
GB (1) GB2193034B (de)
WO (1) WO1988001101A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05102420A (ja) * 1991-10-04 1993-04-23 Nippon Steel Corp 半導体記憶装置の製造方法
DE102014007927A1 (de) 2014-05-27 2015-12-03 Kathrein-Werke Kg Hochfrequenzdichtes Gehäuse, insbesondere hochfrequenzdichtes Filtergehäuse
EP3437895B1 (de) * 2017-08-01 2021-09-29 Faber-Castell AG Stift für schreib- und malzwecke

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4179792A (en) * 1978-04-10 1979-12-25 The United States Of America As Represented By The Secretary Of The Army Low temperature CMOS/SOS process using dry pressure oxidation
JPS6043656B2 (ja) * 1979-06-06 1985-09-30 株式会社東芝 半導体装置の製造方法
US4516316A (en) * 1984-03-27 1985-05-14 Advanced Micro Devices, Inc. Method of making improved twin wells for CMOS devices by controlling spatial separation

Also Published As

Publication number Publication date
WO1988001101A1 (en) 1988-02-11
GB2193034A (en) 1988-01-27
EP0277166A1 (de) 1988-08-10
EP0277166B1 (de) 1993-06-02
DE3786073T2 (de) 1993-09-16
GB8618207D0 (en) 1986-09-03
GB2193034B (en) 1990-01-04
JPH01500473A (ja) 1989-02-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: MITEL SEMICONDUCTOR LTD., SWINDON, WILTSHIRE, GB

8339 Ceased/non-payment of the annual fee