DE3750216D1 - Busvermittlungssystem. - Google Patents

Busvermittlungssystem.

Info

Publication number
DE3750216D1
DE3750216D1 DE3750216T DE3750216T DE3750216D1 DE 3750216 D1 DE3750216 D1 DE 3750216D1 DE 3750216 T DE3750216 T DE 3750216T DE 3750216 T DE3750216 T DE 3750216T DE 3750216 D1 DE3750216 D1 DE 3750216D1
Authority
DE
Germany
Prior art keywords
switching system
bus switching
bus
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3750216T
Other languages
English (en)
Other versions
DE3750216T2 (de
Inventor
Mikio Yonekura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fanuc Corp
Original Assignee
Fanuc Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fanuc Corp filed Critical Fanuc Corp
Publication of DE3750216D1 publication Critical patent/DE3750216D1/de
Application granted granted Critical
Publication of DE3750216T2 publication Critical patent/DE3750216T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/37—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
DE3750216T 1986-05-29 1987-05-16 Busvermittlungssystem. Expired - Fee Related DE3750216T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP61124236A JPS62280948A (ja) 1986-05-29 1986-05-29 バス調停方式
PCT/JP1987/000306 WO1987007409A1 (en) 1986-05-29 1987-05-16 Bus mediation system

Publications (2)

Publication Number Publication Date
DE3750216D1 true DE3750216D1 (de) 1994-08-18
DE3750216T2 DE3750216T2 (de) 1995-03-02

Family

ID=14880339

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3750216T Expired - Fee Related DE3750216T2 (de) 1986-05-29 1987-05-16 Busvermittlungssystem.

Country Status (5)

Country Link
US (1) US4959775A (de)
EP (1) EP0271582B1 (de)
JP (1) JPS62280948A (de)
DE (1) DE3750216T2 (de)
WO (1) WO1987007409A1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5276818A (en) * 1989-04-24 1994-01-04 Hitachi, Ltd. Bus system for information processing system and method of controlling the same
US5263163A (en) * 1990-01-19 1993-11-16 Codex Corporation Arbitration among multiple users of a shared resource
ES2131065T3 (es) * 1992-03-27 1999-07-16 Cit Alcatel Disposicion de control de acceso.
AU6408294A (en) * 1993-03-16 1994-10-11 Ht Research, Inc. A chassis for a multiple computer system
EP0654743A1 (de) * 1993-11-19 1995-05-24 International Business Machines Corporation Rechnersystem mit einem lokalen Bus eines Digitalsignalprozessors
GB2318487B (en) * 1994-03-01 1998-12-16 Intel Corp High performance symmetric arbitration protocol with support for I/O requirements
TW400483B (en) * 1994-03-01 2000-08-01 Intel Corp High performance symmetric arbitration protocol with support for I/O requirements
US6434638B1 (en) 1994-12-09 2002-08-13 International Business Machines Corporation Arbitration protocol for peer-to-peer communication in synchronous systems
GB2298340B (en) * 1994-12-22 1999-06-23 Motorola Israel Ltd Method of operating a communication system
US5740380A (en) * 1996-07-15 1998-04-14 Micron Electronics, Inc. Method and system for apportioning computer bus bandwidth
US6092219A (en) * 1997-12-03 2000-07-18 Micron Technology, Inc. Method for use of bus parking states to communicate diagnostic information
US6112316A (en) * 1997-12-03 2000-08-29 Micron Electronics, Inc. System for use of bus parking states to communicate diagnostic information
US6609171B1 (en) * 1999-12-29 2003-08-19 Intel Corporation Quad pumped bus architecture and protocol
US6928501B2 (en) * 2001-10-15 2005-08-09 Silicon Laboratories, Inc. Serial device daisy chaining method and apparatus
JP2005092780A (ja) * 2003-09-19 2005-04-07 Matsushita Electric Ind Co Ltd リアルタイムプロセッサシステム及び制御方法
KR101089324B1 (ko) * 2004-02-20 2011-12-02 삼성전자주식회사 복수의 마스터들을 포함하는 서브 시스템을 개방형 코어프로토콜을 기반으로 하는 버스에 연결하기 위한 버스시스템
US8296488B2 (en) 2009-04-27 2012-10-23 Abl Ip Holding Llc Automatic self-addressing method for wired network nodes

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5654535A (en) * 1979-10-08 1981-05-14 Hitachi Ltd Bus control system
US4630193A (en) * 1981-04-27 1986-12-16 Textron, Inc. Time multiplexed processor bus
US4494192A (en) * 1982-07-21 1985-01-15 Sperry Corporation High speed bus architecture
JPS59226922A (ja) * 1983-06-07 1984-12-20 Nec Corp バス制御装置
US4602327A (en) * 1983-07-28 1986-07-22 Motorola, Inc. Bus master capable of relinquishing bus on request and retrying bus cycle

Also Published As

Publication number Publication date
EP0271582A1 (de) 1988-06-22
JPS62280948A (ja) 1987-12-05
EP0271582A4 (de) 1989-10-04
EP0271582B1 (de) 1994-07-13
WO1987007409A1 (en) 1987-12-03
US4959775A (en) 1990-09-25
DE3750216T2 (de) 1995-03-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee