DE3750175T2 - Microprocessor with a cache memory. - Google Patents

Microprocessor with a cache memory.

Info

Publication number
DE3750175T2
DE3750175T2 DE3750175T DE3750175T DE3750175T2 DE 3750175 T2 DE3750175 T2 DE 3750175T2 DE 3750175 T DE3750175 T DE 3750175T DE 3750175 T DE3750175 T DE 3750175T DE 3750175 T2 DE3750175 T2 DE 3750175T2
Authority
DE
Germany
Prior art keywords
microprocessor
cache memory
cache
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3750175T
Other languages
German (de)
Other versions
DE3750175D1 (en
Inventor
Makoto Hanawa
Atsushi Hasegawa
Tadahiko Nishimukai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Microcomputer System Ltd
Hitachi Ltd
Original Assignee
Hitachi Microcomputer System Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Microcomputer System Ltd, Hitachi Ltd filed Critical Hitachi Microcomputer System Ltd
Application granted granted Critical
Publication of DE3750175D1 publication Critical patent/DE3750175D1/en
Publication of DE3750175T2 publication Critical patent/DE3750175T2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
DE3750175T 1986-11-14 1987-11-13 Microprocessor with a cache memory. Expired - Fee Related DE3750175T2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27123586 1986-11-14

Publications (2)

Publication Number Publication Date
DE3750175D1 DE3750175D1 (en) 1994-08-11
DE3750175T2 true DE3750175T2 (en) 1994-10-13

Family

ID=17497237

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3750175T Expired - Fee Related DE3750175T2 (en) 1986-11-14 1987-11-13 Microprocessor with a cache memory.

Country Status (5)

Country Link
US (1) US4942521A (en)
EP (1) EP0267628B1 (en)
JP (1) JPS63238646A (en)
KR (1) KR950006590B1 (en)
DE (1) DE3750175T2 (en)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2200483B (en) * 1987-01-22 1991-10-16 Nat Semiconductor Corp Memory referencing in a high performance microprocessor
US4914573A (en) * 1987-10-05 1990-04-03 Motorola, Inc. Bus master which selectively attempts to fill complete entries in a cache line
US6092153A (en) * 1988-11-14 2000-07-18 Lass; Stanley Edwin Subsettable top level cache
JPH04233642A (en) * 1990-07-27 1992-08-21 Dell Usa Corp Processor which performs memory access in parallel with cache access and method used therrfor
JP2773471B2 (en) * 1991-07-24 1998-07-09 日本電気株式会社 Information processing device
US5754814A (en) * 1992-02-28 1998-05-19 Oki Electric Industry Co., Ltd. Cache memory apparatus for reading data corresponding to input address information
US5574877A (en) * 1992-09-25 1996-11-12 Silicon Graphics, Inc. TLB with two physical pages per virtual tag
US5553270A (en) * 1993-09-01 1996-09-03 Digital Equipment Corporation Apparatus for providing improved memory access in page mode access systems with pipelined cache access and main memory address replay
US5611073A (en) * 1995-02-09 1997-03-11 Delco Electronics Corp. Method of ensuring parameter coherency in a multi-processor system
JP2710580B2 (en) * 1995-04-14 1998-02-10 甲府日本電気株式会社 Cache memory device
US5860127A (en) * 1995-06-01 1999-01-12 Hitachi, Ltd. Cache memory employing dynamically controlled data array start timing and a microcomputer using the same
US7304883B2 (en) * 2004-06-09 2007-12-04 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit
EP1978447B1 (en) * 2007-04-05 2011-02-16 STMicroelectronics (Research & Development) Limited Integrated circuit with restricted data access
CN104699627B (en) * 2013-12-06 2019-05-07 上海芯豪微电子有限公司 A kind of caching system and method

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4445172A (en) * 1980-12-31 1984-04-24 Honeywell Information Systems Inc. Data steering logic for the output of a cache memory having an odd/even bank structure
US4424561A (en) * 1980-12-31 1984-01-03 Honeywell Information Systems Inc. Odd/even bank structure for a cache memory
US4363095A (en) * 1980-12-31 1982-12-07 Honeywell Information Systems Inc. Hit/miss logic for a cache memory
US4670839A (en) * 1982-09-27 1987-06-02 Data General Corporation Encachement apparatus using two caches each responsive to a key for simultaneously accessing and combining data therefrom
US4602368A (en) * 1983-04-15 1986-07-22 Honeywell Information Systems Inc. Dual validity bit arrays
US4724518A (en) * 1983-07-29 1988-02-09 Hewlett-Packard Company Odd/even storage in cache memory
US4586130A (en) * 1983-10-03 1986-04-29 Digital Equipment Corporation Central processing unit for a digital computer
CA1272301A (en) * 1985-02-22 1990-07-31 Howard Gene Sachs Cache-memory management unit system
JPS61214039A (en) * 1985-03-20 1986-09-22 Hitachi Ltd Cache memory
US4811209A (en) * 1986-07-31 1989-03-07 Hewlett-Packard Company Cache memory with multiple valid bits for each data indication the validity within different contents

Also Published As

Publication number Publication date
EP0267628B1 (en) 1994-07-06
KR880006600A (en) 1988-07-23
US4942521A (en) 1990-07-17
EP0267628A3 (en) 1990-07-04
DE3750175D1 (en) 1994-08-11
JPS63238646A (en) 1988-10-04
KR950006590B1 (en) 1995-06-19
EP0267628A2 (en) 1988-05-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee