DE3703280A1 - Circuit arrangement containing one or more integrated circuits - Google Patents
Circuit arrangement containing one or more integrated circuitsInfo
- Publication number
- DE3703280A1 DE3703280A1 DE19873703280 DE3703280A DE3703280A1 DE 3703280 A1 DE3703280 A1 DE 3703280A1 DE 19873703280 DE19873703280 DE 19873703280 DE 3703280 A DE3703280 A DE 3703280A DE 3703280 A1 DE3703280 A1 DE 3703280A1
- Authority
- DE
- Germany
- Prior art keywords
- circuit arrangement
- arrangement according
- conductor tracks
- substrate
- ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
Abstract
Description
Die vorliegende Erfindung betrifft eine Schaltungsan ordnung nach dem Oberbegriff des Patentanspruchs 1.The present invention relates to a circuit order according to the preamble of claim 1.
Schaltungsanordnungen der vorgenannten Art finden Verwendung im Zusammenhang mit Flugkörpern, z. B. als Ansteuer- bzw. Verstärker-Hybridschaltungen für Mehr element-Infrarotdetektoren. Sie sind im allgemeinen hohen mechanischen Belastungen ausgesetzt. Die empfind lichen elektronischen Teile sollten zweckmäßig völlig unter Luftabschluß stehen. Handelt es sich um Schal tungsanordnungen integrierter Art mit hoher Packungs dichte, z. B. um Verstärkerschaltungen für einen Infra rotdetektor mit mehreren hundert Elementen, so treten große Schwierigkeiten bei den vielen elektrischen Durchführungen in die vakuumdichten Gehäuse auf. Find circuitry of the aforementioned type Use in connection with missiles, e.g. B. as Drive or amplifier hybrid circuits for more element infrared detectors. They are in general exposed to high mechanical loads. The sens Lichen electronic parts should be completely functional to be in the absence of air. Is it a scarf Integrated arrangements with high packing density, e.g. B. amplifier circuits for an infra red detector with several hundred elements, so step great difficulty with the many electrical Bushings in the vacuum-tight housing.
Der vorliegenden Erfindung liegt die Aufgabe zugrunde, eine Schaltungsanordnung der genannten Art anzugeben, die eine gute Vakuumdichtigkeit bei einfacher Herstell barkeit ermöglicht und die auch den hohen Anforderungen in Flugkörpern gewachsen ist.The present invention is based on the object specify a circuit arrangement of the type mentioned, which has good vacuum tightness with simple manufacture availability and also meet the high requirements has grown in missiles.
Diese Aufgabe wird durch die im Kennzeichen des Patent anspruchs 1 angegebenen Merkmale gelöst.This task is accomplished by the in the hallmark of the patent claims 1 specified features solved.
Die Verwendung von Keramik als Substrat ermöglicht eine mechanisch stabile Aufbauweise mit hoher Genauigkeit. Es lassen sich darauf Leitungszüge mit hoher Packungs dichte vakuumdicht aufbringen. Die Kapselung mit einem Metallteil ergibt ein stabiles vakuumdichtes Gehäuse und die Verwendung einer Glaslotdichtung ergibt neben einer einwandfreien Isolation eine hohe Dichtigkeit gegenüber unterschiedlichen Außendrücken.The use of ceramic as a substrate enables one mechanically stable construction with high accuracy. There can be cables with high packing apply tight vacuum tight. The encapsulation with one Metal part results in a stable vacuum-tight housing and the use of a glass solder seal also results in impeccable insulation high tightness against different external pressures.
Anhand der in den Fig. 1 und 2 dargestellten bevor zugten Ausführungsbeispiele wird die Erfindung nachfol gend näher erläutert.Based on the in Figs. 1 and 2 shown before ferred embodiments of the invention will be explained in more detail nachfol quietly.
Die Fig. 1 zeigt eine erfindungsgemäße Schaltungsan ordnung im Querschnitt und die Fig. 2 einen Ausschnitt einer Aufsicht auf eine erfindungsgemäße Schaltungs anordnung, die ringförmig die Grundplatte eines Infra rotdetektors umgibt. Fig. 1 shows a circuit arrangement according to the invention in cross section and Fig. 2 shows a detail of a plan view of a circuit arrangement according to the invention, which surrounds the base plate of an infrared detector in a ring.
In Fig. 1 trägt das Keramiksubstrat 6 eine Vielzahl von vakuumdicht aufgebrachten Leiterbahnen 4 und 5, von denen jeweils nur eine sichtbar ist. Auf dem Substrat 6 befindet sich weiterhin ein integrierter Hybridschalt kreis 2, dessen Anschlüsse in einer bekannten Weise mit den Leiterbahnen 4 bzw. 5 elektrisch leitend verbunden sind. In Fig. 1, the ceramic substrate 6 carries a plurality of vacuum-tightly applied conductor tracks 4 and 5 , only one of which is visible in each case. On the substrate 6 there is also an integrated hybrid circuit 2 , the connections of which are electrically conductively connected to the conductor tracks 4 and 5 in a known manner.
Um den oder die Schaltkreise 2 gegen die Atmosphäre abzukapseln, ist über den Schaltkreis 2 eine Metall kappe 1 gestülpt, deren Ränder 8 unter Zwischenfügung eines Glaslotes 3 vakuumdicht mit den Oberflächen der Leiterbahnen 4 und 5 sowie den dazwischenliegenden Oberflächenbereichen des Substrats 6 verbunden sind. Das Glaslot 3 ist zweckmäßig ein solches, das durch Rekristallisation den Charakter einer Glaskeramik annimmt. Es garantiert eine hohe mechanische Festig keit, eine ausgezeichnete Isolation zwischen den ein zelnen Leiterbahnen 4 bzw. 5 und der Metallkappe 1 und eine hohe Vakuumdichtigkeit.In order to encapsulate the circuit or circuits 2 from the atmosphere, a metal cap 1 is placed over the circuit 2 , the edges 8 of which are vacuum-tightly connected to the surfaces of the conductor tracks 4 and 5 and the intermediate surface areas of the substrate 6 with the interposition of a glass solder 3 . The glass solder 3 is expediently one which takes on the character of a glass ceramic by recrystallization. It guarantees high mechanical strength, excellent insulation between the individual conductor tracks 4 and 5 and the metal cap 1 and high vacuum tightness.
Die Fig. 2 zeigt einen Ausschnitt einer ringförmigen Ausbildung des Keramiksubstrats 6, das ein kreisför miges Isolierteil 7 umgibt. Das Isolierteil 7 ist die Grundplatte eines Mehrelementen-Infrarotdetektors mit Kryostatkühlung. Auf dem Isolierteil 7 befinden sich eine von der Anzahl der Detektorelemente abhängige Anzahl von radial nach außen laufenden Leiterbahnen 9 (z. B. 322 Leiterbahnen). Diese Leiterbahnen 9 sind durch Bonden 10 mit den Leiterbahnen 5 auf dem Keramik substrat 6 elektrisch leitend verbunden. Die Kappe 1 ist ebenfalls ringförmig die Grundplatte 7 umgebend ausgebildet. Entsprechend bilden die Lotnähte 3 Ring nähte. Unter der Ringkappe 1 befinden sich eine Viel zahl von Hybrid-Verstärker-IC, die einerseits mit den Leiterbahnen 5 und andererseits mit den äußeren An schlüssen 4 elektrisch leitend verbunden sind. Fig. 2 shows a section of an annular configuration of the ceramic substrate 6 , which surrounds a circular insulating member 7 . The insulating part 7 is the base plate of a multi-element infrared detector with cryostat cooling. A number of radially outwardly running conductor tracks 9 (for example 322 conductor tracks) are located on the insulating part 7 , depending on the number of detector elements. These conductor tracks 9 are electrically conductively connected by bonding 10 to the conductor tracks 5 on the ceramic substrate 6 . The cap 1 is also formed annularly surrounding the base plate 7 . Accordingly, the solder seams form 3 ring seams. Under the ring cap 1 are a lot of hybrid amplifier IC, the one hand with the conductor tracks 5 and on the other hand with the outer connections 4 are electrically connected.
Claims (7)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19873703280 DE3703280A1 (en) | 1987-02-04 | 1987-02-04 | Circuit arrangement containing one or more integrated circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19873703280 DE3703280A1 (en) | 1987-02-04 | 1987-02-04 | Circuit arrangement containing one or more integrated circuits |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3703280A1 true DE3703280A1 (en) | 1988-08-18 |
Family
ID=6320171
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19873703280 Withdrawn DE3703280A1 (en) | 1987-02-04 | 1987-02-04 | Circuit arrangement containing one or more integrated circuits |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE3703280A1 (en) |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3404319A (en) * | 1964-08-21 | 1968-10-01 | Nippon Electric Co | Semiconductor device |
DE1952789C3 (en) * | 1968-10-21 | 1974-04-18 | Hitachi, Ltd., Tokio | Airtight encapsulation for electronic components |
DE2453665B2 (en) * | 1973-11-23 | 1979-10-11 | Technology Glass Corp., Menlo Park, Calif. (V.St.A.) | Powder-like sealing material suitable for bodies made of ceramic, glass or metal, consisting of a mixture of two powder components |
DE3002353A1 (en) * | 1979-01-23 | 1980-07-31 | Asahi Glass Co Ltd | GASKET GLASS |
EP0092944A1 (en) * | 1982-04-24 | 1983-11-02 | Kabushiki Kaisha Toshiba | Method for packaging electronic parts |
US4622433A (en) * | 1984-03-30 | 1986-11-11 | Diacon, Inc. | Ceramic package system using low temperature sealing glasses |
CH660258A5 (en) * | 1983-01-20 | 1987-03-31 | Landis & Gyr Ag | CERAMIC HOUSING FOR A HYBRID CIRCUIT. |
-
1987
- 1987-02-04 DE DE19873703280 patent/DE3703280A1/en not_active Withdrawn
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3404319A (en) * | 1964-08-21 | 1968-10-01 | Nippon Electric Co | Semiconductor device |
DE1952789C3 (en) * | 1968-10-21 | 1974-04-18 | Hitachi, Ltd., Tokio | Airtight encapsulation for electronic components |
DE2453665B2 (en) * | 1973-11-23 | 1979-10-11 | Technology Glass Corp., Menlo Park, Calif. (V.St.A.) | Powder-like sealing material suitable for bodies made of ceramic, glass or metal, consisting of a mixture of two powder components |
DE3002353A1 (en) * | 1979-01-23 | 1980-07-31 | Asahi Glass Co Ltd | GASKET GLASS |
EP0092944A1 (en) * | 1982-04-24 | 1983-11-02 | Kabushiki Kaisha Toshiba | Method for packaging electronic parts |
CH660258A5 (en) * | 1983-01-20 | 1987-03-31 | Landis & Gyr Ag | CERAMIC HOUSING FOR A HYBRID CIRCUIT. |
US4622433A (en) * | 1984-03-30 | 1986-11-11 | Diacon, Inc. | Ceramic package system using low temperature sealing glasses |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8181 | Inventor (new situation) |
Free format text: KLAUS, WOLFGANG, 7901 STAIG, DE LOBENSTEIN, WALTER, 7910 NEU-ULM, DE THEISS, JOSEPH, 7900 ULM, DE TESSARI, HANS, 7770 UEBERLINGEN, DE |
|
8127 | New person/name/address of the applicant |
Owner name: LICENTIA PATENT-VERWALTUNGS-GMBH, 6000 FRANKFURT, |
|
8110 | Request for examination paragraph 44 | ||
8127 | New person/name/address of the applicant |
Owner name: AEG INFRAROT-MODULE GMBH, 74072 HEILBRONN, DE BODE |
|
8139 | Disposal/non-payment of the annual fee |