DE3675201D1 - Befehlsabwicklungsfolgesteuerung fuer mikroprozessor mit gitteraufbau. - Google Patents

Befehlsabwicklungsfolgesteuerung fuer mikroprozessor mit gitteraufbau.

Info

Publication number
DE3675201D1
DE3675201D1 DE8686905316T DE3675201T DE3675201D1 DE 3675201 D1 DE3675201 D1 DE 3675201D1 DE 8686905316 T DE8686905316 T DE 8686905316T DE 3675201 T DE3675201 T DE 3675201T DE 3675201 D1 DE3675201 D1 DE 3675201D1
Authority
DE
Germany
Prior art keywords
microprocessor
grid
processing control
command processing
command
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686905316T
Other languages
English (en)
Inventor
Christian Bocquet
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Application granted granted Critical
Publication of DE3675201D1 publication Critical patent/DE3675201D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/223—Execution means for microinstructions irrespective of the microinstruction function, e.g. decoding of microinstructions and nanoinstructions; timing of microinstructions; programmable logic arrays; delays and fan-out problems

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
DE8686905316T 1985-09-13 1986-09-10 Befehlsabwicklungsfolgesteuerung fuer mikroprozessor mit gitteraufbau. Expired - Fee Related DE3675201D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8513634A FR2587516B1 (fr) 1985-09-13 1985-09-13 Sequenceur d'instructions pour microprocesseur a architecture en reseau
PCT/FR1986/000302 WO1987001838A1 (fr) 1985-09-13 1986-09-10 Sequenceur d'instructions pour microprocesseur a architecture en reseau

Publications (1)

Publication Number Publication Date
DE3675201D1 true DE3675201D1 (de) 1990-11-29

Family

ID=9322901

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686905316T Expired - Fee Related DE3675201D1 (de) 1985-09-13 1986-09-10 Befehlsabwicklungsfolgesteuerung fuer mikroprozessor mit gitteraufbau.

Country Status (6)

Country Link
US (2) USRE38171E1 (de)
EP (1) EP0238528B1 (de)
JP (1) JPH0711781B2 (de)
DE (1) DE3675201D1 (de)
FR (1) FR2587516B1 (de)
WO (1) WO1987001838A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5283481A (en) * 1990-12-26 1994-02-01 International Business Machines Corporation Bipolar element bifet array decoder

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2951040A1 (de) * 1979-01-16 1980-07-24 Digital Equipment Corp Steuerspeicher in einem steuerabschnitt eines rechners
JPS5885638A (ja) * 1981-11-17 1983-05-23 Ricoh Co Ltd プログラマブルロジツクアレイ
US4660171A (en) * 1981-12-21 1987-04-21 International Business Machines Corp. Apparatus and method using a programmable logic array for decoding an operation code and providing a plurality of sequential output states
JPS58170120A (ja) * 1982-03-30 1983-10-06 Nec Corp 半導体集積回路
US4546273A (en) * 1983-01-11 1985-10-08 Burroughs Corporation Dynamic re-programmable PLA
US4652992A (en) * 1983-09-20 1987-03-24 Mensch Jr William D Topography of integrated circuit CMOS microprocessor chip
US4583012A (en) * 1983-10-20 1986-04-15 General Instrument Corporation Logical circuit array
US4752901A (en) * 1985-09-16 1988-06-21 Motorola, Inc. Arithmetic logic unit utilizing strobed gates
JPS62283488A (ja) * 1985-12-27 1987-12-09 Nec Corp デコ−ダ回路
US4675556A (en) * 1986-06-09 1987-06-23 Intel Corporation Binomially-encoded finite state machine

Also Published As

Publication number Publication date
EP0238528A1 (de) 1987-09-30
FR2587516A1 (fr) 1987-03-20
US4878195A (en) 1989-10-31
USRE38171E1 (en) 2003-07-01
JPH0711781B2 (ja) 1995-02-08
JPS63501249A (ja) 1988-05-12
FR2587516B1 (fr) 1987-11-20
WO1987001838A1 (fr) 1987-03-26
EP0238528B1 (de) 1990-10-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee