DE3574094D1 - Monolithic interface circuit between a signal processor and a telecommunication network - Google Patents
Monolithic interface circuit between a signal processor and a telecommunication networkInfo
- Publication number
- DE3574094D1 DE3574094D1 DE8585201377T DE3574094T DE3574094D1 DE 3574094 D1 DE3574094 D1 DE 3574094D1 DE 8585201377 T DE8585201377 T DE 8585201377T DE 3574094 T DE3574094 T DE 3574094T DE 3574094 D1 DE3574094 D1 DE 3574094D1
- Authority
- DE
- Germany
- Prior art keywords
- signal processor
- interface circuit
- telecommunication network
- monolithic interface
- monolithic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0002—Modulated-carrier systems analog front ends; means for connecting modulators, demodulators or transceivers to a transmission line
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8413772A FR2570235B1 (fr) | 1984-09-07 | 1984-09-07 | Circuit d'interface analogique monolithique entre un processeur de signal et un reseau de telecommunication |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3574094D1 true DE3574094D1 (en) | 1989-12-07 |
Family
ID=9307525
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8585201377T Expired DE3574094D1 (en) | 1984-09-07 | 1985-08-30 | Monolithic interface circuit between a signal processor and a telecommunication network |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0175410B1 (de) |
JP (1) | JP2650667B2 (de) |
AU (1) | AU4715085A (de) |
DE (1) | DE3574094D1 (de) |
FR (1) | FR2570235B1 (de) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4964116A (en) * | 1988-11-02 | 1990-10-16 | Ant Nachrichtentechnik Gmbh | DS3 - line interface linear array (lila) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4439864A (en) * | 1980-04-03 | 1984-03-27 | Codex Corporation | Modem circuitry |
JPS5812460A (ja) * | 1981-07-14 | 1983-01-24 | Omron Tateisi Electronics Co | 伝送形式自動整合装置 |
US4466106A (en) * | 1981-08-28 | 1984-08-14 | Novation, Inc. | Frequency shift keyed modem chip set |
JPS58147247A (ja) * | 1982-02-26 | 1983-09-02 | Casio Comput Co Ltd | パルス符号伝送方式 |
-
1984
- 1984-09-07 FR FR8413772A patent/FR2570235B1/fr not_active Expired
-
1985
- 1985-08-30 EP EP19850201377 patent/EP0175410B1/de not_active Expired
- 1985-08-30 DE DE8585201377T patent/DE3574094D1/de not_active Expired
- 1985-09-06 AU AU47150/85A patent/AU4715085A/en not_active Abandoned
- 1985-09-07 JP JP60196903A patent/JP2650667B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0175410B1 (de) | 1989-11-02 |
FR2570235B1 (fr) | 1989-07-28 |
JPS6184142A (ja) | 1986-04-28 |
AU4715085A (en) | 1986-03-13 |
FR2570235A1 (fr) | 1986-03-14 |
EP0175410A1 (de) | 1986-03-26 |
JP2650667B2 (ja) | 1997-09-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |